recv.c (ee3e542fec6e69bc9fb668698889a37d93950ddf) | recv.c (e96542e55a2aacf4bdeccfe2f17b77c4895b4df2) |
---|---|
1/* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES --- 28 unchanged lines hidden (view full) --- 37 */ 38static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf) 39{ 40 struct ath_hw *ah = sc->sc_ah; 41 struct ath_common *common = ath9k_hw_common(ah); 42 struct ath_desc *ds; 43 struct sk_buff *skb; 44 | 1/* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES --- 28 unchanged lines hidden (view full) --- 37 */ 38static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf) 39{ 40 struct ath_hw *ah = sc->sc_ah; 41 struct ath_common *common = ath9k_hw_common(ah); 42 struct ath_desc *ds; 43 struct sk_buff *skb; 44 |
45 ATH_RXBUF_RESET(bf); 46 | |
47 ds = bf->bf_desc; 48 ds->ds_link = 0; /* link to null */ 49 ds->ds_data = bf->bf_buf_addr; 50 51 /* virtual addr of the beginning of the buffer. */ 52 skb = bf->bf_mpdu; 53 BUG_ON(skb == NULL); 54 ds->ds_vdata = skb->data; --- 10 unchanged lines hidden (view full) --- 65 if (sc->rx.rxlink == NULL) 66 ath9k_hw_putrxbuf(ah, bf->bf_daddr); 67 else 68 *sc->rx.rxlink = bf->bf_daddr; 69 70 sc->rx.rxlink = &ds->ds_link; 71} 72 | 45 ds = bf->bf_desc; 46 ds->ds_link = 0; /* link to null */ 47 ds->ds_data = bf->bf_buf_addr; 48 49 /* virtual addr of the beginning of the buffer. */ 50 skb = bf->bf_mpdu; 51 BUG_ON(skb == NULL); 52 ds->ds_vdata = skb->data; --- 10 unchanged lines hidden (view full) --- 63 if (sc->rx.rxlink == NULL) 64 ath9k_hw_putrxbuf(ah, bf->bf_daddr); 65 else 66 *sc->rx.rxlink = bf->bf_daddr; 67 68 sc->rx.rxlink = &ds->ds_link; 69} 70 |
71static void ath_rx_buf_relink(struct ath_softc *sc, struct ath_buf *bf) 72{ 73 if (sc->rx.buf_hold) 74 ath_rx_buf_link(sc, sc->rx.buf_hold); 75 76 sc->rx.buf_hold = bf; 77} 78 |
|
73static void ath_setdefantenna(struct ath_softc *sc, u32 antenna) 74{ 75 /* XXX block beacon interrupts */ 76 ath9k_hw_setantenna(sc->sc_ah, antenna); 77 sc->rx.defant = antenna; 78 sc->rx.rxotherant = 0; 79} 80 --- 31 unchanged lines hidden (view full) --- 112 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize) 113 return false; 114 115 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 116 list_del_init(&bf->list); 117 118 skb = bf->bf_mpdu; 119 | 79static void ath_setdefantenna(struct ath_softc *sc, u32 antenna) 80{ 81 /* XXX block beacon interrupts */ 82 ath9k_hw_setantenna(sc->sc_ah, antenna); 83 sc->rx.defant = antenna; 84 sc->rx.rxotherant = 0; 85} 86 --- 31 unchanged lines hidden (view full) --- 118 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize) 119 return false; 120 121 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); 122 list_del_init(&bf->list); 123 124 skb = bf->bf_mpdu; 125 |
120 ATH_RXBUF_RESET(bf); | |
121 memset(skb->data, 0, ah->caps.rx_status_len); 122 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, 123 ah->caps.rx_status_len, DMA_TO_DEVICE); 124 125 SKB_CB_ATHBUF(skb) = bf; 126 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype); 127 __skb_queue_tail(&rx_edma->rx_fifo, skb); 128 --- 298 unchanged lines hidden (view full) --- 427 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 428 ath_edma_start_recv(sc); 429 return 0; 430 } 431 432 if (list_empty(&sc->rx.rxbuf)) 433 goto start_recv; 434 | 126 memset(skb->data, 0, ah->caps.rx_status_len); 127 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, 128 ah->caps.rx_status_len, DMA_TO_DEVICE); 129 130 SKB_CB_ATHBUF(skb) = bf; 131 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype); 132 __skb_queue_tail(&rx_edma->rx_fifo, skb); 133 --- 298 unchanged lines hidden (view full) --- 432 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 433 ath_edma_start_recv(sc); 434 return 0; 435 } 436 437 if (list_empty(&sc->rx.rxbuf)) 438 goto start_recv; 439 |
440 sc->rx.buf_hold = NULL; |
|
435 sc->rx.rxlink = NULL; 436 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) { 437 ath_rx_buf_link(sc, bf); 438 } 439 440 /* We could have deleted elements so the list may be empty now */ 441 if (list_empty(&sc->rx.rxbuf)) 442 goto start_recv; --- 229 unchanged lines hidden (view full) --- 672 int ret; 673 674 if (list_empty(&sc->rx.rxbuf)) { 675 sc->rx.rxlink = NULL; 676 return NULL; 677 } 678 679 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); | 441 sc->rx.rxlink = NULL; 442 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) { 443 ath_rx_buf_link(sc, bf); 444 } 445 446 /* We could have deleted elements so the list may be empty now */ 447 if (list_empty(&sc->rx.rxbuf)) 448 goto start_recv; --- 229 unchanged lines hidden (view full) --- 678 int ret; 679 680 if (list_empty(&sc->rx.rxbuf)) { 681 sc->rx.rxlink = NULL; 682 return NULL; 683 } 684 685 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); |
686 if (bf == sc->rx.buf_hold) 687 return NULL; 688 |
|
680 ds = bf->bf_desc; 681 682 /* 683 * Must provide the virtual address of the current 684 * descriptor, the physical address, and the virtual 685 * address of the next descriptor in the h/w chain. 686 * This allows the HAL to look ahead to see if the 687 * hardware is done with a descriptor by checking the --- 464 unchanged lines hidden (view full) --- 1152} 1153 1154int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) 1155{ 1156 struct ath_buf *bf; 1157 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb; 1158 struct ieee80211_rx_status *rxs; 1159 struct ath_hw *ah = sc->sc_ah; | 689 ds = bf->bf_desc; 690 691 /* 692 * Must provide the virtual address of the current 693 * descriptor, the physical address, and the virtual 694 * address of the next descriptor in the h/w chain. 695 * This allows the HAL to look ahead to see if the 696 * hardware is done with a descriptor by checking the --- 464 unchanged lines hidden (view full) --- 1161} 1162 1163int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) 1164{ 1165 struct ath_buf *bf; 1166 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb; 1167 struct ieee80211_rx_status *rxs; 1168 struct ath_hw *ah = sc->sc_ah; |
1169 struct ath9k_hw_capabilities *pCap = &ah->caps; |
|
1160 struct ath_common *common = ath9k_hw_common(ah); 1161 struct ieee80211_hw *hw = sc->hw; 1162 struct ieee80211_hdr *hdr; 1163 int retval; 1164 struct ath_rx_status rs; 1165 enum ath9k_rx_qtype qtype; 1166 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); 1167 int dma_type; --- 155 unchanged lines hidden (view full) --- 1323 sc->rx.frag = NULL; 1324 1325 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len), 1326 skb->len); 1327 dev_kfree_skb_any(skb); 1328 skb = hdr_skb; 1329 } 1330 | 1170 struct ath_common *common = ath9k_hw_common(ah); 1171 struct ieee80211_hw *hw = sc->hw; 1172 struct ieee80211_hdr *hdr; 1173 int retval; 1174 struct ath_rx_status rs; 1175 enum ath9k_rx_qtype qtype; 1176 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); 1177 int dma_type; --- 155 unchanged lines hidden (view full) --- 1333 sc->rx.frag = NULL; 1334 1335 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len), 1336 skb->len); 1337 dev_kfree_skb_any(skb); 1338 skb = hdr_skb; 1339 } 1340 |
1341 if (rxs->flag & RX_FLAG_MMIC_STRIPPED) 1342 skb_trim(skb, skb->len - 8); |
|
1331 | 1343 |
1332 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) { | 1344 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1345 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON | 1346 PS_WAIT_FOR_CAB | 1347 PS_WAIT_FOR_PSPOLL_DATA)) || 1348 ath9k_check_auto_sleep(sc)) 1349 ath_rx_ps(sc, skb, rs.is_mybeacon); 1350 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); |
1333 | 1351 |
1352 /* 1353 * Run the LNA combining algorithm only in these cases: 1354 * 1355 * Standalone WLAN cards with both LNA/Antenna diversity 1356 * enabled in the EEPROM. 1357 * 1358 * WLAN+BT cards which are in the supported card list 1359 * in ath_pci_id_table and the user has loaded the 1360 * driver with "bt_ant_diversity" set to true. 1361 */ 1362 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) { |
|
1334 /* | 1363 /* |
1335 * change the default rx antenna if rx diversity | 1364 * Change the default rx antenna if rx diversity |
1336 * chooses the other antenna 3 times in a row. 1337 */ 1338 if (sc->rx.defant != rs.rs_antenna) { 1339 if (++sc->rx.rxotherant >= 3) 1340 ath_setdefantenna(sc, rs.rs_antenna); 1341 } else { 1342 sc->rx.rxotherant = 0; 1343 } 1344 | 1365 * chooses the other antenna 3 times in a row. 1366 */ 1367 if (sc->rx.defant != rs.rs_antenna) { 1368 if (++sc->rx.rxotherant >= 3) 1369 ath_setdefantenna(sc, rs.rs_antenna); 1370 } else { 1371 sc->rx.rxotherant = 0; 1372 } 1373 |
1374 if (pCap->hw_caps & ATH9K_HW_CAP_BT_ANT_DIV) { 1375 if (common->bt_ant_diversity) 1376 ath_ant_comb_scan(sc, &rs); 1377 } else { 1378 ath_ant_comb_scan(sc, &rs); 1379 } |
|
1345 } 1346 | 1380 } 1381 |
1347 if (rxs->flag & RX_FLAG_MMIC_STRIPPED) 1348 skb_trim(skb, skb->len - 8); 1349 1350 spin_lock_irqsave(&sc->sc_pm_lock, flags); 1351 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON | 1352 PS_WAIT_FOR_CAB | 1353 PS_WAIT_FOR_PSPOLL_DATA)) || 1354 ath9k_check_auto_sleep(sc)) 1355 ath_rx_ps(sc, skb, rs.is_mybeacon); 1356 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1357 1358 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx == 3) 1359 ath_ant_comb_scan(sc, &rs); 1360 | |
1361 ath9k_apply_ampdu_details(sc, &rs, rxs); 1362 1363 ieee80211_rx(hw, skb); 1364 1365requeue_drop_frag: 1366 if (sc->rx.frag) { 1367 dev_kfree_skb_any(sc->rx.frag); 1368 sc->rx.frag = NULL; 1369 } 1370requeue: 1371 list_add_tail(&bf->list, &sc->rx.rxbuf); 1372 if (flush) 1373 continue; 1374 1375 if (edma) { 1376 ath_rx_edma_buf_link(sc, qtype); 1377 } else { | 1382 ath9k_apply_ampdu_details(sc, &rs, rxs); 1383 1384 ieee80211_rx(hw, skb); 1385 1386requeue_drop_frag: 1387 if (sc->rx.frag) { 1388 dev_kfree_skb_any(sc->rx.frag); 1389 sc->rx.frag = NULL; 1390 } 1391requeue: 1392 list_add_tail(&bf->list, &sc->rx.rxbuf); 1393 if (flush) 1394 continue; 1395 1396 if (edma) { 1397 ath_rx_edma_buf_link(sc, qtype); 1398 } else { |
1378 ath_rx_buf_link(sc, bf); | 1399 ath_rx_buf_relink(sc, bf); |
1379 ath9k_hw_rxena(ah); 1380 } 1381 } while (1); 1382 1383 if (!(ah->imask & ATH9K_INT_RXEOL)) { 1384 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 1385 ath9k_hw_set_interrupts(ah); 1386 } 1387 1388 return 0; 1389} | 1400 ath9k_hw_rxena(ah); 1401 } 1402 } while (1); 1403 1404 if (!(ah->imask & ATH9K_INT_RXEOL)) { 1405 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 1406 ath9k_hw_set_interrupts(ah); 1407 } 1408 1409 return 0; 1410} |