init.c (b4d3de8ca25fcdf697da38d9f9785cb508edea4d) | init.c (82b2d334314c387ebd857b88a3d889c9a2cfec4a) |
---|---|
1/* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES --- 256 unchanged lines hidden (view full) --- 265 if (AR_SREV_9280_20_OR_LATER(ah)) { 266 if (max_streams >= 2) 267 ht_info->cap |= IEEE80211_HT_CAP_TX_STBC; 268 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 269 } 270 271 /* set up supported mcs set */ 272 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); | 1/* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES --- 256 unchanged lines hidden (view full) --- 265 if (AR_SREV_9280_20_OR_LATER(ah)) { 266 if (max_streams >= 2) 267 ht_info->cap |= IEEE80211_HT_CAP_TX_STBC; 268 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 269 } 270 271 /* set up supported mcs set */ 272 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); |
273 tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, max_streams); 274 rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, max_streams); | 273 tx_streams = ath9k_cmn_count_streams(ah->txchainmask, max_streams); 274 rx_streams = ath9k_cmn_count_streams(ah->rxchainmask, max_streams); |
275 276 ath_dbg(common, ATH_DBG_CONFIG, 277 "TX streams %d, RX streams: %d\n", 278 tx_streams, rx_streams); 279 280 if (tx_streams != rx_streams) { 281 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; 282 ht_info->mcs.tx_params |= ((tx_streams - 1) << --- 218 unchanged lines hidden (view full) --- 501 502 sc->config.txpowlimit = ATH_TXPOWER_MAX; 503 504 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { 505 sc->sc_flags |= SC_OP_TXAGGR; 506 sc->sc_flags |= SC_OP_RXAGGR; 507 } 508 | 275 276 ath_dbg(common, ATH_DBG_CONFIG, 277 "TX streams %d, RX streams: %d\n", 278 tx_streams, rx_streams); 279 280 if (tx_streams != rx_streams) { 281 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; 282 ht_info->mcs.tx_params |= ((tx_streams - 1) << --- 218 unchanged lines hidden (view full) --- 501 502 sc->config.txpowlimit = ATH_TXPOWER_MAX; 503 504 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { 505 sc->sc_flags |= SC_OP_TXAGGR; 506 sc->sc_flags |= SC_OP_RXAGGR; 507 } 508 |
509 common->tx_chainmask = sc->sc_ah->caps.tx_chainmask; 510 common->rx_chainmask = sc->sc_ah->caps.rx_chainmask; 511 | |
512 ath9k_hw_set_diversity(sc->sc_ah, true); 513 sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah); 514 515 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 516 517 sc->beacon.slottime = ATH9K_SLOT_TIME_9; 518 519 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) --- 121 unchanged lines hidden (view full) --- 641 ath9k_hw_set_txpowerlimit(ah, MAX_RATE_POWER, true); 642 chan->max_power = reg->max_power_level / 2; 643 } 644} 645 646static void ath9k_init_txpower_limits(struct ath_softc *sc) 647{ 648 struct ath_hw *ah = sc->sc_ah; | 509 ath9k_hw_set_diversity(sc->sc_ah, true); 510 sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah); 511 512 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 513 514 sc->beacon.slottime = ATH9K_SLOT_TIME_9; 515 516 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) --- 121 unchanged lines hidden (view full) --- 638 ath9k_hw_set_txpowerlimit(ah, MAX_RATE_POWER, true); 639 chan->max_power = reg->max_power_level / 2; 640 } 641} 642 643static void ath9k_init_txpower_limits(struct ath_softc *sc) 644{ 645 struct ath_hw *ah = sc->sc_ah; |
649 struct ath_common *common = ath9k_hw_common(sc->sc_ah); | |
650 struct ath9k_channel *curchan = ah->curchan; 651 | 646 struct ath9k_channel *curchan = ah->curchan; 647 |
652 ah->txchainmask = common->tx_chainmask; | |
653 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 654 ath9k_init_band_txpower(sc, IEEE80211_BAND_2GHZ); 655 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 656 ath9k_init_band_txpower(sc, IEEE80211_BAND_5GHZ); 657 658 ah->curchan = curchan; 659} 660 --- 258 unchanged lines hidden --- | 648 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 649 ath9k_init_band_txpower(sc, IEEE80211_BAND_2GHZ); 650 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 651 ath9k_init_band_txpower(sc, IEEE80211_BAND_5GHZ); 652 653 ah->curchan = curchan; 654} 655 --- 258 unchanged lines hidden --- |