| pd692x0.c (2f5e6395714d0ee53c150da38b25975fe37755c2) | pd692x0.c (a6a9fcb10836105e525ccb8bc1a6af4b20a113be) |
|---|---|
| 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Driver for the Microchip PD692X0 PoE PSE Controller driver (I2C bus) 4 * 5 * Copyright (c) 2023 Bootlin, Kory Maincent <kory.maincent@bootlin.com> 6 */ 7 8#include <linux/delay.h> --- 575 unchanged lines hidden (view full) --- 584 } 585 586 for (i = 0; i < PD692X0_CLASS_PW_TABLE_SIZE; i++, pw_table++) { 587 if (pw > (pw_table->class_pw + pw_table->max_added_class_pw)) 588 continue; 589 590 if (pw < pw_table->class_pw) { 591 dev_err(dev, | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Driver for the Microchip PD692X0 PoE PSE Controller driver (I2C bus) 4 * 5 * Copyright (c) 2023 Bootlin, Kory Maincent <kory.maincent@bootlin.com> 6 */ 7 8#include <linux/delay.h> --- 575 unchanged lines hidden (view full) --- 584 } 585 586 for (i = 0; i < PD692X0_CLASS_PW_TABLE_SIZE; i++, pw_table++) { 587 if (pw > (pw_table->class_pw + pw_table->max_added_class_pw)) 588 continue; 589 590 if (pw < pw_table->class_pw) { 591 dev_err(dev, |
| 592 "Power limit %dmW not supported. Ranges availables: [%d-%d] or [%d-%d]\n", | 592 "Power limit %dmW not supported. Ranges available: [%d-%d] or [%d-%d]\n", |
| 593 pw, 594 (pw_table - 1)->class_pw, 595 (pw_table - 1)->class_pw + (pw_table - 1)->max_added_class_pw, 596 pw_table->class_pw, 597 pw_table->class_pw + pw_table->max_added_class_pw); 598 return -ERANGE; 599 } 600 --- 938 unchanged lines hidden --- | 593 pw, 594 (pw_table - 1)->class_pw, 595 (pw_table - 1)->class_pw + (pw_table - 1)->max_added_class_pw, 596 pw_table->class_pw, 597 pw_table->class_pw + pw_table->max_added_class_pw); 598 return -ERANGE; 599 } 600 --- 938 unchanged lines hidden --- |