bcm7xxx.c (e219aafe50fd546b8686582ddbafd24c3c2eda04) bcm7xxx.c (84eff6d194df442bee62c129f2f47efb0dbd0468)
1/*
2 * Broadcom BCM7xxx internal transceivers support.
3 *
4 * Copyright (C) 2014, Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version

--- 156 unchanged lines hidden (view full) ---

165
166static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
167{
168 u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags);
169 u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags);
170 int ret = 0;
171
172 pr_info_once("%s: %s PHY revision: 0x%02x, patch: %d\n",
1/*
2 * Broadcom BCM7xxx internal transceivers support.
3 *
4 * Copyright (C) 2014, Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version

--- 156 unchanged lines hidden (view full) ---

165
166static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
167{
168 u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags);
169 u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags);
170 int ret = 0;
171
172 pr_info_once("%s: %s PHY revision: 0x%02x, patch: %d\n",
173 dev_name(&phydev->dev), phydev->drv->name, rev, patch);
173 phydev_name(phydev), phydev->drv->name, rev, patch);
174
175 /* Dummy read to a register to workaround an issue upon reset where the
176 * internal inverter may not allow the first MDIO transaction to pass
177 * the MDIO management controller and make us return 0xffff for such
178 * reads.
179 */
180 phy_read(phydev, MII_BMSR);
181

--- 174 unchanged lines hidden (view full) ---

356 .flags = PHY_IS_INTERNAL,
357 .config_init = bcm7xxx_config_init,
358 .config_aneg = genphy_config_aneg,
359 .read_status = genphy_read_status,
360 .suspend = bcm7xxx_suspend,
361 .resume = bcm7xxx_config_init,
362 .driver = { .owner = THIS_MODULE },
363}, {
174
175 /* Dummy read to a register to workaround an issue upon reset where the
176 * internal inverter may not allow the first MDIO transaction to pass
177 * the MDIO management controller and make us return 0xffff for such
178 * reads.
179 */
180 phy_read(phydev, MII_BMSR);
181

--- 174 unchanged lines hidden (view full) ---

356 .flags = PHY_IS_INTERNAL,
357 .config_init = bcm7xxx_config_init,
358 .config_aneg = genphy_config_aneg,
359 .read_status = genphy_read_status,
360 .suspend = bcm7xxx_suspend,
361 .resume = bcm7xxx_config_init,
362 .driver = { .owner = THIS_MODULE },
363}, {
364 .phy_id = PHY_ID_BCM7435,
365 .phy_id_mask = 0xfffffff0,
366 .name = "Broadcom BCM7435",
367 .features = PHY_GBIT_FEATURES |
368 SUPPORTED_Pause | SUPPORTED_Asym_Pause,
369 .flags = PHY_IS_INTERNAL,
370 .config_init = bcm7xxx_config_init,
371 .config_aneg = genphy_config_aneg,
372 .read_status = genphy_read_status,
373 .suspend = bcm7xxx_suspend,
374 .resume = bcm7xxx_config_init,
375 .driver = { .owner = THIS_MODULE },
376}, {
364 .phy_id = PHY_BCM_OUI_4,
365 .phy_id_mask = 0xffff0000,
366 .name = "Broadcom BCM7XXX 40nm",
367 .features = PHY_GBIT_FEATURES |
368 SUPPORTED_Pause | SUPPORTED_Asym_Pause,
369 .flags = PHY_IS_INTERNAL,
370 .config_init = bcm7xxx_config_init,
371 .config_aneg = genphy_config_aneg,

--- 18 unchanged lines hidden (view full) ---

390
391static struct mdio_device_id __maybe_unused bcm7xxx_tbl[] = {
392 { PHY_ID_BCM7250, 0xfffffff0, },
393 { PHY_ID_BCM7364, 0xfffffff0, },
394 { PHY_ID_BCM7366, 0xfffffff0, },
395 { PHY_ID_BCM7425, 0xfffffff0, },
396 { PHY_ID_BCM7429, 0xfffffff0, },
397 { PHY_ID_BCM7439, 0xfffffff0, },
377 .phy_id = PHY_BCM_OUI_4,
378 .phy_id_mask = 0xffff0000,
379 .name = "Broadcom BCM7XXX 40nm",
380 .features = PHY_GBIT_FEATURES |
381 SUPPORTED_Pause | SUPPORTED_Asym_Pause,
382 .flags = PHY_IS_INTERNAL,
383 .config_init = bcm7xxx_config_init,
384 .config_aneg = genphy_config_aneg,

--- 18 unchanged lines hidden (view full) ---

403
404static struct mdio_device_id __maybe_unused bcm7xxx_tbl[] = {
405 { PHY_ID_BCM7250, 0xfffffff0, },
406 { PHY_ID_BCM7364, 0xfffffff0, },
407 { PHY_ID_BCM7366, 0xfffffff0, },
408 { PHY_ID_BCM7425, 0xfffffff0, },
409 { PHY_ID_BCM7429, 0xfffffff0, },
410 { PHY_ID_BCM7439, 0xfffffff0, },
411 { PHY_ID_BCM7435, 0xfffffff0, },
398 { PHY_ID_BCM7445, 0xfffffff0, },
399 { PHY_BCM_OUI_4, 0xffff0000 },
400 { PHY_BCM_OUI_5, 0xffffff00 },
401 { }
402};
403
404module_phy_driver(bcm7xxx_driver);
405
406MODULE_DEVICE_TABLE(mdio, bcm7xxx_tbl);
407
408MODULE_DESCRIPTION("Broadcom BCM7xxx internal PHY driver");
409MODULE_LICENSE("GPL");
410MODULE_AUTHOR("Broadcom Corporation");
412 { PHY_ID_BCM7445, 0xfffffff0, },
413 { PHY_BCM_OUI_4, 0xffff0000 },
414 { PHY_BCM_OUI_5, 0xffffff00 },
415 { }
416};
417
418module_phy_driver(bcm7xxx_driver);
419
420MODULE_DEVICE_TABLE(mdio, bcm7xxx_tbl);
421
422MODULE_DESCRIPTION("Broadcom BCM7xxx internal PHY driver");
423MODULE_LICENSE("GPL");
424MODULE_AUTHOR("Broadcom Corporation");