hwif.c (e42f6f9be4f83c537aa81b4c6239ea94ff5b29ce) hwif.c (cc577b01ba12b07733eaf3b7590256fefe42236d)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (c) 2018 Synopsys, Inc. and/or its affiliates.
4 * stmmac HW Interface Handling
5 */
6
7#include "common.h"
8#include "stmmac.h"

--- 119 unchanged lines hidden (view full) ---

128 .ptp_off = PTP_GMAC4_OFFSET,
129 .mmc_off = MMC_GMAC4_OFFSET,
130 },
131 .desc = &dwmac4_desc_ops,
132 .dma = &dwmac4_dma_ops,
133 .mac = &dwmac4_ops,
134 .hwtimestamp = &stmmac_ptp,
135 .mode = NULL,
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (c) 2018 Synopsys, Inc. and/or its affiliates.
4 * stmmac HW Interface Handling
5 */
6
7#include "common.h"
8#include "stmmac.h"

--- 119 unchanged lines hidden (view full) ---

128 .ptp_off = PTP_GMAC4_OFFSET,
129 .mmc_off = MMC_GMAC4_OFFSET,
130 },
131 .desc = &dwmac4_desc_ops,
132 .dma = &dwmac4_dma_ops,
133 .mac = &dwmac4_ops,
134 .hwtimestamp = &stmmac_ptp,
135 .mode = NULL,
136 .tc = NULL,
136 .tc = &dwmac510_tc_ops,
137 .setup = dwmac4_setup,
138 .quirks = stmmac_dwmac4_quirks,
139 }, {
140 .gmac = false,
141 .gmac4 = true,
142 .xgmac = false,
143 .min_id = DWMAC_CORE_4_00,
144 .regs = {
145 .ptp_off = PTP_GMAC4_OFFSET,
146 .mmc_off = MMC_GMAC4_OFFSET,
147 },
148 .desc = &dwmac4_desc_ops,
149 .dma = &dwmac4_dma_ops,
150 .mac = &dwmac410_ops,
151 .hwtimestamp = &stmmac_ptp,
152 .mode = &dwmac4_ring_mode_ops,
137 .setup = dwmac4_setup,
138 .quirks = stmmac_dwmac4_quirks,
139 }, {
140 .gmac = false,
141 .gmac4 = true,
142 .xgmac = false,
143 .min_id = DWMAC_CORE_4_00,
144 .regs = {
145 .ptp_off = PTP_GMAC4_OFFSET,
146 .mmc_off = MMC_GMAC4_OFFSET,
147 },
148 .desc = &dwmac4_desc_ops,
149 .dma = &dwmac4_dma_ops,
150 .mac = &dwmac410_ops,
151 .hwtimestamp = &stmmac_ptp,
152 .mode = &dwmac4_ring_mode_ops,
153 .tc = NULL,
153 .tc = &dwmac510_tc_ops,
154 .setup = dwmac4_setup,
155 .quirks = NULL,
156 }, {
157 .gmac = false,
158 .gmac4 = true,
159 .xgmac = false,
160 .min_id = DWMAC_CORE_4_10,
161 .regs = {
162 .ptp_off = PTP_GMAC4_OFFSET,
163 .mmc_off = MMC_GMAC4_OFFSET,
164 },
165 .desc = &dwmac4_desc_ops,
166 .dma = &dwmac410_dma_ops,
167 .mac = &dwmac410_ops,
168 .hwtimestamp = &stmmac_ptp,
169 .mode = &dwmac4_ring_mode_ops,
154 .setup = dwmac4_setup,
155 .quirks = NULL,
156 }, {
157 .gmac = false,
158 .gmac4 = true,
159 .xgmac = false,
160 .min_id = DWMAC_CORE_4_10,
161 .regs = {
162 .ptp_off = PTP_GMAC4_OFFSET,
163 .mmc_off = MMC_GMAC4_OFFSET,
164 },
165 .desc = &dwmac4_desc_ops,
166 .dma = &dwmac410_dma_ops,
167 .mac = &dwmac410_ops,
168 .hwtimestamp = &stmmac_ptp,
169 .mode = &dwmac4_ring_mode_ops,
170 .tc = NULL,
170 .tc = &dwmac510_tc_ops,
171 .setup = dwmac4_setup,
172 .quirks = NULL,
173 }, {
174 .gmac = false,
175 .gmac4 = true,
176 .xgmac = false,
177 .min_id = DWMAC_CORE_5_10,
178 .regs = {

--- 17 unchanged lines hidden (view full) ---

196 .ptp_off = PTP_XGMAC_OFFSET,
197 .mmc_off = 0,
198 },
199 .desc = &dwxgmac210_desc_ops,
200 .dma = &dwxgmac210_dma_ops,
201 .mac = &dwxgmac210_ops,
202 .hwtimestamp = &stmmac_ptp,
203 .mode = NULL,
171 .setup = dwmac4_setup,
172 .quirks = NULL,
173 }, {
174 .gmac = false,
175 .gmac4 = true,
176 .xgmac = false,
177 .min_id = DWMAC_CORE_5_10,
178 .regs = {

--- 17 unchanged lines hidden (view full) ---

196 .ptp_off = PTP_XGMAC_OFFSET,
197 .mmc_off = 0,
198 },
199 .desc = &dwxgmac210_desc_ops,
200 .dma = &dwxgmac210_dma_ops,
201 .mac = &dwxgmac210_ops,
202 .hwtimestamp = &stmmac_ptp,
203 .mode = NULL,
204 .tc = NULL,
204 .tc = &dwmac510_tc_ops,
205 .setup = dwxgmac2_setup,
206 .quirks = NULL,
207 },
208};
209
210int stmmac_hwif_init(struct stmmac_priv *priv)
211{
212 bool needs_xgmac = priv->plat->has_xgmac;

--- 78 unchanged lines hidden --- 		205 .setup = dwxgmac2_setup,
206 .quirks = NULL,
207 },
208};
209
210int stmmac_hwif_init(struct stmmac_priv *priv)
211{
212 bool needs_xgmac = priv->plat->has_xgmac;

--- 78 unchanged lines hidden ---