qed.h (bba9525520b6028ecbe7486e13216e9ede8636be) qed.h (2528c389936efbbece25088426fe7c3c91ff355f)
1/* QLogic qed NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

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87 QED_NVM_WRITE_NVRAM = DRV_MSG_CODE_NVM_WRITE_NVRAM,
88 QED_GET_MCP_NVM_RESP = 0xFFFFFF00
89};
90
91struct qed_eth_cb_ops;
92struct qed_dev_info;
93union qed_mcp_protocol_stats;
94enum qed_mcp_protocol_type;
1/* QLogic qed NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

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87 QED_NVM_WRITE_NVRAM = DRV_MSG_CODE_NVM_WRITE_NVRAM,
88 QED_GET_MCP_NVM_RESP = 0xFFFFFF00
89};
90
91struct qed_eth_cb_ops;
92struct qed_dev_info;
93union qed_mcp_protocol_stats;
94enum qed_mcp_protocol_type;
95enum qed_mfw_tlv_type;
96union qed_mfw_tlv_data;
95
96/* helpers */
97#define QED_MFW_GET_FIELD(name, field) \
98 (((name) & (field ## _MASK)) >> (field ## _SHIFT))
99
100#define QED_MFW_SET_FIELD(name, field, value) \
101 do { \
102 (name) &= ~(field ## _MASK); \

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434struct qed_fw_data {
435 struct fw_ver_info *fw_ver_info;
436 const u8 *modes_tree_buf;
437 union init_op *init_ops;
438 const u32 *arr_data;
439 u32 init_ops_size;
440};
441
97
98/* helpers */
99#define QED_MFW_GET_FIELD(name, field) \
100 (((name) & (field ## _MASK)) >> (field ## _SHIFT))
101
102#define QED_MFW_SET_FIELD(name, field, value) \
103 do { \
104 (name) &= ~(field ## _MASK); \

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436struct qed_fw_data {
437 struct fw_ver_info *fw_ver_info;
438 const u8 *modes_tree_buf;
439 union init_op *init_ops;
440 const u32 *arr_data;
441 u32 init_ops_size;
442};
443
444enum qed_mf_mode_bit {
445 /* Supports PF-classification based on tag */
446 QED_MF_OVLAN_CLSS,
447
448 /* Supports PF-classification based on MAC */
449 QED_MF_LLH_MAC_CLSS,
450
451 /* Supports PF-classification based on protocol type */
452 QED_MF_LLH_PROTO_CLSS,
453
454 /* Requires a default PF to be set */
455 QED_MF_NEED_DEF_PF,
456
457 /* Allow LL2 to multicast/broadcast */
458 QED_MF_LL2_NON_UNICAST,
459
460 /* Allow Cross-PF [& child VFs] Tx-switching */
461 QED_MF_INTER_PF_SWITCH,
462
463 /* Unified Fabtic Port support enabled */
464 QED_MF_UFP_SPECIFIC,
465
466 /* Disable Accelerated Receive Flow Steering (aRFS) */
467 QED_MF_DISABLE_ARFS,
468
469 /* Use vlan for steering */
470 QED_MF_8021Q_TAGGING,
471
472 /* Use stag for steering */
473 QED_MF_8021AD_TAGGING,
474
475 /* Allow DSCP to TC mapping */
476 QED_MF_DSCP_TO_TC_MAP,
477};
478
479enum qed_ufp_mode {
480 QED_UFP_MODE_ETS,
481 QED_UFP_MODE_VNIC_BW,
482 QED_UFP_MODE_UNKNOWN
483};
484
485enum qed_ufp_pri_type {
486 QED_UFP_PRI_OS,
487 QED_UFP_PRI_VNIC,
488 QED_UFP_PRI_UNKNOWN
489};
490
491struct qed_ufp_info {
492 enum qed_ufp_pri_type pri_type;
493 enum qed_ufp_mode mode;
494 u8 tc;
495};
496
442enum BAR_ID {
443 BAR_ID_0, /* used for GRC */
444 BAR_ID_1 /* Used for doorbells */
445};
446
447struct qed_nvm_image_info {
448 u32 num_images;
449 struct bist_nvm_image_att *image_att;

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542 bool b_drv_link_init;
543
544 struct qed_vf_iov *vf_iov_info;
545 struct qed_pf_iov *pf_iov_info;
546 struct qed_mcp_info *mcp_info;
547
548 struct qed_dcbx_info *p_dcbx_info;
549
497enum BAR_ID {
498 BAR_ID_0, /* used for GRC */
499 BAR_ID_1 /* Used for doorbells */
500};
501
502struct qed_nvm_image_info {
503 u32 num_images;
504 struct bist_nvm_image_att *image_att;

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597 bool b_drv_link_init;
598
599 struct qed_vf_iov *vf_iov_info;
600 struct qed_pf_iov *pf_iov_info;
601 struct qed_mcp_info *mcp_info;
602
603 struct qed_dcbx_info *p_dcbx_info;
604
605 struct qed_ufp_info ufp_info;
606
550 struct qed_dmae_info dmae_info;
551
552 /* QM init */
553 struct qed_qm_info qm_info;
554 struct qed_storm_stats storm_stats;
555
556 /* Buffer for unzipping firmware data */
557 void *unzip_buf;

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664#define CHIP_BOND_ID_MASK 0xf
665#define CHIP_BOND_ID_SHIFT 0
666
667 u8 num_engines;
668 u8 num_ports_in_engine;
669 u8 num_funcs_in_port;
670
671 u8 path_id;
607 struct qed_dmae_info dmae_info;
608
609 /* QM init */
610 struct qed_qm_info qm_info;
611 struct qed_storm_stats storm_stats;
612
613 /* Buffer for unzipping firmware data */
614 void *unzip_buf;

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721#define CHIP_BOND_ID_MASK 0xf
722#define CHIP_BOND_ID_SHIFT 0
723
724 u8 num_engines;
725 u8 num_ports_in_engine;
726 u8 num_funcs_in_port;
727
728 u8 path_id;
672 enum qed_mf_mode mf_mode;
673#define IS_MF_DEFAULT(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_DEFAULT)
674#define IS_MF_SI(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_NPAR)
675#define IS_MF_SD(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_OVLAN)
676
729
730 unsigned long mf_bits;
731
677 int pcie_width;
678 int pcie_speed;
679
680 /* Add MF related configuration */
681 u8 mcp_rev;
682 u8 boot_mode;
683
684 /* WoL related configurations */

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849 u32 input_len, u8 *input_buf,
850 u32 max_size, u8 *unzip_buf);
851void qed_get_protocol_stats(struct qed_dev *cdev,
852 enum qed_mcp_protocol_type type,
853 union qed_mcp_protocol_stats *stats);
854int qed_slowpath_irq_req(struct qed_hwfn *hwfn);
855void qed_slowpath_irq_sync(struct qed_hwfn *p_hwfn);
856
732 int pcie_width;
733 int pcie_speed;
734
735 /* Add MF related configuration */
736 u8 mcp_rev;
737 u8 boot_mode;
738
739 /* WoL related configurations */

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904 u32 input_len, u8 *input_buf,
905 u32 max_size, u8 *unzip_buf);
906void qed_get_protocol_stats(struct qed_dev *cdev,
907 enum qed_mcp_protocol_type type,
908 union qed_mcp_protocol_stats *stats);
909int qed_slowpath_irq_req(struct qed_hwfn *hwfn);
910void qed_slowpath_irq_sync(struct qed_hwfn *p_hwfn);
911
912int qed_mfw_fill_tlv_data(struct qed_hwfn *hwfn,
913 enum qed_mfw_tlv_type type,
914 union qed_mfw_tlv_data *tlv_data);
857#endif /* _QED_H */
915#endif /* _QED_H */