qed.h (53f071e19d566e7d0a4eada1bd8313a4cdb660a4) qed.h (0bc5fe857274133ca028ebb15ff2e8549a369916)
1/* QLogic qed NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

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434struct qed_fw_data {
435 struct fw_ver_info *fw_ver_info;
436 const u8 *modes_tree_buf;
437 union init_op *init_ops;
438 const u32 *arr_data;
439 u32 init_ops_size;
440};
441
1/* QLogic qed NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

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434struct qed_fw_data {
435 struct fw_ver_info *fw_ver_info;
436 const u8 *modes_tree_buf;
437 union init_op *init_ops;
438 const u32 *arr_data;
439 u32 init_ops_size;
440};
441
442enum qed_mf_mode_bit {
443 /* Supports PF-classification based on tag */
444 QED_MF_OVLAN_CLSS,
445
446 /* Supports PF-classification based on MAC */
447 QED_MF_LLH_MAC_CLSS,
448
449 /* Supports PF-classification based on protocol type */
450 QED_MF_LLH_PROTO_CLSS,
451
452 /* Requires a default PF to be set */
453 QED_MF_NEED_DEF_PF,
454
455 /* Allow LL2 to multicast/broadcast */
456 QED_MF_LL2_NON_UNICAST,
457
458 /* Allow Cross-PF [& child VFs] Tx-switching */
459 QED_MF_INTER_PF_SWITCH,
460
461 /* Unified Fabtic Port support enabled */
462 QED_MF_UFP_SPECIFIC,
463
464 /* Disable Accelerated Receive Flow Steering (aRFS) */
465 QED_MF_DISABLE_ARFS,
466
467 /* Use vlan for steering */
468 QED_MF_8021Q_TAGGING,
469
470 /* Use stag for steering */
471 QED_MF_8021AD_TAGGING,
472
473 /* Allow DSCP to TC mapping */
474 QED_MF_DSCP_TO_TC_MAP,
475};
476
442enum BAR_ID {
443 BAR_ID_0, /* used for GRC */
444 BAR_ID_1 /* Used for doorbells */
445};
446
447struct qed_nvm_image_info {
448 u32 num_images;
449 struct bist_nvm_image_att *image_att;

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664#define CHIP_BOND_ID_MASK 0xf
665#define CHIP_BOND_ID_SHIFT 0
666
667 u8 num_engines;
668 u8 num_ports_in_engine;
669 u8 num_funcs_in_port;
670
671 u8 path_id;
477enum BAR_ID {
478 BAR_ID_0, /* used for GRC */
479 BAR_ID_1 /* Used for doorbells */
480};
481
482struct qed_nvm_image_info {
483 u32 num_images;
484 struct bist_nvm_image_att *image_att;

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699#define CHIP_BOND_ID_MASK 0xf
700#define CHIP_BOND_ID_SHIFT 0
701
702 u8 num_engines;
703 u8 num_ports_in_engine;
704 u8 num_funcs_in_port;
705
706 u8 path_id;
672 enum qed_mf_mode mf_mode;
673#define IS_MF_DEFAULT(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_DEFAULT)
674#define IS_MF_SI(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_NPAR)
675#define IS_MF_SD(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_OVLAN)
676
707
708 unsigned long mf_bits;
709
677 int pcie_width;
678 int pcie_speed;
679
680 /* Add MF related configuration */
681 u8 mcp_rev;
682 u8 boot_mode;
683
684 /* WoL related configurations */

--- 173 unchanged lines hidden --- 		710 int pcie_width;
711 int pcie_speed;
712
713 /* Add MF related configuration */
714 u8 mcp_rev;
715 u8 boot_mode;
716
717 /* WoL related configurations */

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