pci.c (7555b7f3385fb0cf5416cf38b4f7bd2bc1312f23) pci.c (5642c6a086939bd1c0bba692f3a4afe4df668a50)
1// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/export.h>
7#include <linux/err.h>
8#include <linux/device.h>
9#include <linux/pci.h>
10#include <linux/interrupt.h>
11#include <linux/types.h>
12#include <linux/skbuff.h>
13#include <linux/if_vlan.h>
14#include <linux/log2.h>
15#include <linux/string.h>
1// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/export.h>
7#include <linux/err.h>
8#include <linux/device.h>
9#include <linux/pci.h>
10#include <linux/interrupt.h>
11#include <linux/types.h>
12#include <linux/skbuff.h>
13#include <linux/if_vlan.h>
14#include <linux/log2.h>
15#include <linux/string.h>
16#include <net/page_pool/helpers.h>
16
17#include "pci_hw.h"
18#include "pci.h"
19#include "core.h"
20#include "cmd.h"
21#include "port.h"
22#include "resources.h"
23

--- 59 unchanged lines hidden (view full) ---

83 u8 elem_size; /* size of one element */
84 enum mlxsw_pci_queue_type type;
85 struct mlxsw_pci *pci;
86 union {
87 struct {
88 enum mlxsw_pci_cqe_v v;
89 struct mlxsw_pci_queue *dq;
90 struct napi_struct napi;
17
18#include "pci_hw.h"
19#include "pci.h"
20#include "core.h"
21#include "cmd.h"
22#include "port.h"
23#include "resources.h"
24

--- 59 unchanged lines hidden (view full) ---

84 u8 elem_size; /* size of one element */
85 enum mlxsw_pci_queue_type type;
86 struct mlxsw_pci *pci;
87 union {
88 struct {
89 enum mlxsw_pci_cqe_v v;
90 struct mlxsw_pci_queue *dq;
91 struct napi_struct napi;
92 struct page_pool *page_pool;
91 } cq;
92 struct {
93 struct tasklet_struct tasklet;
94 } eq;
95 struct {
96 struct mlxsw_pci_queue *cq;
97 } rdq;
98 } u;

--- 234 unchanged lines hidden (view full) ---

333}
334
335static void mlxsw_pci_sdq_fini(struct mlxsw_pci *mlxsw_pci,
336 struct mlxsw_pci_queue *q)
337{
338 mlxsw_cmd_hw2sw_sdq(mlxsw_pci->core, q->num);
339}
340
93 } cq;
94 struct {
95 struct tasklet_struct tasklet;
96 } eq;
97 struct {
98 struct mlxsw_pci_queue *cq;
99 } rdq;
100 } u;

--- 234 unchanged lines hidden (view full) ---

335}
336
337static void mlxsw_pci_sdq_fini(struct mlxsw_pci *mlxsw_pci,
338 struct mlxsw_pci_queue *q)
339{
340 mlxsw_cmd_hw2sw_sdq(mlxsw_pci->core, q->num);
341}
342
343#define MLXSW_PCI_SKB_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
344
345#define MLXSW_PCI_RX_BUF_SW_OVERHEAD \
346 (MLXSW_PCI_SKB_HEADROOM + \
347 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
348
341static int mlxsw_pci_wqe_frag_map(struct mlxsw_pci *mlxsw_pci, char *wqe,
342 int index, char *frag_data, size_t frag_len,
343 int direction)
344{
345 struct pci_dev *pdev = mlxsw_pci->pdev;
346 dma_addr_t mapaddr;
347
348 mapaddr = dma_map_single(&pdev->dev, frag_data, frag_len, direction);

--- 490 unchanged lines hidden (view full) ---

839 }
840}
841
842static void mlxsw_pci_cq_napi_teardown(struct mlxsw_pci_queue *q)
843{
844 netif_napi_del(&q->u.cq.napi);
845}
846
349static int mlxsw_pci_wqe_frag_map(struct mlxsw_pci *mlxsw_pci, char *wqe,
350 int index, char *frag_data, size_t frag_len,
351 int direction)
352{
353 struct pci_dev *pdev = mlxsw_pci->pdev;
354 dma_addr_t mapaddr;
355
356 mapaddr = dma_map_single(&pdev->dev, frag_data, frag_len, direction);

--- 490 unchanged lines hidden (view full) ---

847 }
848}
849
850static void mlxsw_pci_cq_napi_teardown(struct mlxsw_pci_queue *q)
851{
852 netif_napi_del(&q->u.cq.napi);
853}
854
855static int mlxsw_pci_cq_page_pool_init(struct mlxsw_pci_queue *q,
856 enum mlxsw_pci_cq_type cq_type)
857{
858 struct page_pool_params pp_params = {};
859 struct mlxsw_pci *mlxsw_pci = q->pci;
860 struct page_pool *page_pool;
861 u32 max_pkt_size;
862
863 if (cq_type != MLXSW_PCI_CQ_RDQ)
864 return 0;
865
866 max_pkt_size = MLXSW_PORT_MAX_MTU + MLXSW_PCI_RX_BUF_SW_OVERHEAD;
867 pp_params.order = get_order(max_pkt_size);
868 pp_params.flags = PP_FLAG_DMA_MAP;
869 pp_params.pool_size = MLXSW_PCI_WQE_COUNT;
870 pp_params.nid = dev_to_node(&mlxsw_pci->pdev->dev);
871 pp_params.dev = &mlxsw_pci->pdev->dev;
872 pp_params.napi = &q->u.cq.napi;
873 pp_params.dma_dir = DMA_FROM_DEVICE;
874
875 page_pool = page_pool_create(&pp_params);
876 if (IS_ERR(page_pool))
877 return PTR_ERR(page_pool);
878
879 q->u.cq.page_pool = page_pool;
880 return 0;
881}
882
883static void mlxsw_pci_cq_page_pool_fini(struct mlxsw_pci_queue *q,
884 enum mlxsw_pci_cq_type cq_type)
885{
886 if (cq_type != MLXSW_PCI_CQ_RDQ)
887 return;
888
889 page_pool_destroy(q->u.cq.page_pool);
890}
891
847static int mlxsw_pci_cq_init(struct mlxsw_pci *mlxsw_pci, char *mbox,
848 struct mlxsw_pci_queue *q)
849{
892static int mlxsw_pci_cq_init(struct mlxsw_pci *mlxsw_pci, char *mbox,
893 struct mlxsw_pci_queue *q)
894{
895 enum mlxsw_pci_cq_type cq_type = mlxsw_pci_cq_type(mlxsw_pci, q);
850 int i;
851 int err;
852
853 q->consumer_counter = 0;
854
855 for (i = 0; i < q->count; i++) {
856 char *elem = mlxsw_pci_queue_elem_get(q, i);
857

--- 13 unchanged lines hidden (view full) ---

871 for (i = 0; i < MLXSW_PCI_AQ_PAGES; i++) {
872 dma_addr_t mapaddr = __mlxsw_pci_queue_page_get(q, i);
873
874 mlxsw_cmd_mbox_sw2hw_cq_pa_set(mbox, i, mapaddr);
875 }
876 err = mlxsw_cmd_sw2hw_cq(mlxsw_pci->core, mbox, q->num);
877 if (err)
878 return err;
896 int i;
897 int err;
898
899 q->consumer_counter = 0;
900
901 for (i = 0; i < q->count; i++) {
902 char *elem = mlxsw_pci_queue_elem_get(q, i);
903

--- 13 unchanged lines hidden (view full) ---

917 for (i = 0; i < MLXSW_PCI_AQ_PAGES; i++) {
918 dma_addr_t mapaddr = __mlxsw_pci_queue_page_get(q, i);
919
920 mlxsw_cmd_mbox_sw2hw_cq_pa_set(mbox, i, mapaddr);
921 }
922 err = mlxsw_cmd_sw2hw_cq(mlxsw_pci->core, mbox, q->num);
923 if (err)
924 return err;
879 mlxsw_pci_cq_napi_setup(q, mlxsw_pci_cq_type(mlxsw_pci, q));
925 mlxsw_pci_cq_napi_setup(q, cq_type);
926
927 err = mlxsw_pci_cq_page_pool_init(q, cq_type);
928 if (err)
929 goto err_page_pool_init;
930
880 napi_enable(&q->u.cq.napi);
881 mlxsw_pci_queue_doorbell_consumer_ring(mlxsw_pci, q);
882 mlxsw_pci_queue_doorbell_arm_consumer_ring(mlxsw_pci, q);
883 return 0;
931 napi_enable(&q->u.cq.napi);
932 mlxsw_pci_queue_doorbell_consumer_ring(mlxsw_pci, q);
933 mlxsw_pci_queue_doorbell_arm_consumer_ring(mlxsw_pci, q);
934 return 0;
935
936err_page_pool_init:
937 mlxsw_pci_cq_napi_teardown(q);
938 return err;
884}
885
886static void mlxsw_pci_cq_fini(struct mlxsw_pci *mlxsw_pci,
887 struct mlxsw_pci_queue *q)
888{
939}
940
941static void mlxsw_pci_cq_fini(struct mlxsw_pci *mlxsw_pci,
942 struct mlxsw_pci_queue *q)
943{
944 enum mlxsw_pci_cq_type cq_type = mlxsw_pci_cq_type(mlxsw_pci, q);
945
889 napi_disable(&q->u.cq.napi);
946 napi_disable(&q->u.cq.napi);
947 mlxsw_pci_cq_page_pool_fini(q, cq_type);
890 mlxsw_pci_cq_napi_teardown(q);
891 mlxsw_cmd_hw2sw_cq(mlxsw_pci->core, q->num);
892}
893
894static u16 mlxsw_pci_cq_elem_count(const struct mlxsw_pci_queue *q)
895{
896 return q->u.cq.v == MLXSW_PCI_CQE_V2 ? MLXSW_PCI_CQE2_COUNT :
897 MLXSW_PCI_CQE01_COUNT;

--- 1399 unchanged lines hidden --- 		948 mlxsw_pci_cq_napi_teardown(q);
949 mlxsw_cmd_hw2sw_cq(mlxsw_pci->core, q->num);
950}
951
952static u16 mlxsw_pci_cq_elem_count(const struct mlxsw_pci_queue *q)
953{
954 return q->u.cq.v == MLXSW_PCI_CQE_V2 ? MLXSW_PCI_CQE2_COUNT :
955 MLXSW_PCI_CQE01_COUNT;

--- 1399 unchanged lines hidden ---