srq.c (e4da3fbfbd1de56d2367653e3823e6445e49f8a9) srq.c (f9baff509f8a05a79626defdbdf4f4aa4efd373b)
1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the

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81 if (atomic_dec_and_test(&srq->refcount))
82 complete(&srq->free);
83}
84
85static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
86 int srq_num)
87{
88 return mlx4_cmd(dev, mailbox->dma, srq_num, 0, MLX4_CMD_SW2HW_SRQ,
1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the

--- 72 unchanged lines hidden (view full) ---

81 if (atomic_dec_and_test(&srq->refcount))
82 complete(&srq->free);
83}
84
85static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
86 int srq_num)
87{
88 return mlx4_cmd(dev, mailbox->dma, srq_num, 0, MLX4_CMD_SW2HW_SRQ,
89 MLX4_CMD_TIME_CLASS_A);
89 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
90}
91
92static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
93 int srq_num)
94{
95 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
96 mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ,
90}
91
92static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
93 int srq_num)
94{
95 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
96 mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ,
97 MLX4_CMD_TIME_CLASS_A);
97 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
98}
99
100static int mlx4_ARM_SRQ(struct mlx4_dev *dev, int srq_num, int limit_watermark)
101{
102 return mlx4_cmd(dev, limit_watermark, srq_num, 0, MLX4_CMD_ARM_SRQ,
98}
99
100static int mlx4_ARM_SRQ(struct mlx4_dev *dev, int srq_num, int limit_watermark)
101{
102 return mlx4_cmd(dev, limit_watermark, srq_num, 0, MLX4_CMD_ARM_SRQ,
103 MLX4_CMD_TIME_CLASS_B);
103 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
104}
105
106static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
107 int srq_num)
108{
109 return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ,
104}
105
106static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
107 int srq_num)
108{
109 return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ,
110 MLX4_CMD_TIME_CLASS_A);
110 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
111}
112
113int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd,
114 struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq)
115{
116 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
117 struct mlx4_cmd_mailbox *mailbox;
118 struct mlx4_srq_context *srq_context;

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111}
112
113int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd,
114 struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq)
115{
116 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
117 struct mlx4_cmd_mailbox *mailbox;
118 struct mlx4_srq_context *srq_context;

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