mcg.c (e4da3fbfbd1de56d2367653e3823e6445e49f8a9) mcg.c (f9baff509f8a05a79626defdbdf4f4aa4efd373b)
1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the

--- 34 unchanged lines hidden (view full) ---

43#define MGM_BLCK_LB_BIT 30
44
45static const u8 zero_gid[16]; /* automatically initialized to 0 */
46
47static int mlx4_READ_ENTRY(struct mlx4_dev *dev, int index,
48 struct mlx4_cmd_mailbox *mailbox)
49{
50 return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG,
1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the

--- 34 unchanged lines hidden (view full) ---

43#define MGM_BLCK_LB_BIT 30
44
45static const u8 zero_gid[16]; /* automatically initialized to 0 */
46
47static int mlx4_READ_ENTRY(struct mlx4_dev *dev, int index,
48 struct mlx4_cmd_mailbox *mailbox)
49{
50 return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG,
51 MLX4_CMD_TIME_CLASS_A);
51 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
52}
53
54static int mlx4_WRITE_ENTRY(struct mlx4_dev *dev, int index,
55 struct mlx4_cmd_mailbox *mailbox)
56{
57 return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG,
52}
53
54static int mlx4_WRITE_ENTRY(struct mlx4_dev *dev, int index,
55 struct mlx4_cmd_mailbox *mailbox)
56{
57 return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG,
58 MLX4_CMD_TIME_CLASS_A);
58 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
59}
60
61static int mlx4_WRITE_PROMISC(struct mlx4_dev *dev, u8 vep_num, u8 port, u8 steer,
62 struct mlx4_cmd_mailbox *mailbox)
63{
64 u32 in_mod;
65
66 in_mod = (u32) vep_num << 24 | (u32) port << 16 | steer << 1;
67 return mlx4_cmd(dev, mailbox->dma, in_mod, 0x1,
59}
60
61static int mlx4_WRITE_PROMISC(struct mlx4_dev *dev, u8 vep_num, u8 port, u8 steer,
62 struct mlx4_cmd_mailbox *mailbox)
63{
64 u32 in_mod;
65
66 in_mod = (u32) vep_num << 24 | (u32) port << 16 | steer << 1;
67 return mlx4_cmd(dev, mailbox->dma, in_mod, 0x1,
68 MLX4_CMD_WRITE_MCG, MLX4_CMD_TIME_CLASS_A);
68 MLX4_CMD_WRITE_MCG, MLX4_CMD_TIME_CLASS_A,
69 MLX4_CMD_NATIVE);
69}
70
71static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
72 u16 *hash, u8 op_mod)
73{
74 u64 imm;
75 int err;
76
77 err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod,
70}
71
72static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
73 u16 *hash, u8 op_mod)
74{
75 u64 imm;
76 int err;
77
78 err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod,
78 MLX4_CMD_MGID_HASH, MLX4_CMD_TIME_CLASS_A);
79 MLX4_CMD_MGID_HASH, MLX4_CMD_TIME_CLASS_A,
80 MLX4_CMD_NATIVE);
79
80 if (!err)
81 *hash = imm;
82
83 return err;
84}
85
86static struct mlx4_promisc_qp *get_promisc_qp(struct mlx4_dev *dev, u8 pf_num,

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81
82 if (!err)
83 *hash = imm;
84
85 return err;
86}
87
88static struct mlx4_promisc_qp *get_promisc_qp(struct mlx4_dev *dev, u8 pf_num,

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