ixgbe.h (4319a7976722f6925b5bbbdac417d87a0cbde859) ixgbe.h (b4f47a483045a6e6b31be8ade76cdfef7091f18b)
1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2016 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.

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165 struct list_head l;
166 int vf;
167 bool free;
168 bool is_macvlan;
169 u8 vf_macvlan[ETH_ALEN];
170};
171
172#define IXGBE_MAX_TXD_PWR 14
1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2016 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.

--- 156 unchanged lines hidden (view full) ---

165 struct list_head l;
166 int vf;
167 bool free;
168 bool is_macvlan;
169 u8 vf_macvlan[ETH_ALEN];
170};
171
172#define IXGBE_MAX_TXD_PWR 14
173#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
173#define IXGBE_MAX_DATA_PER_TXD (1u << IXGBE_MAX_TXD_PWR)
174
175/* Tx Descriptors needed, worst case */
176#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
177#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
178
179/* wrapper around a pointer to a socket buffer,
180 * so a DMA handle can be stored along with the buffer */
181struct ixgbe_tx_buffer {

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615 struct pci_dev *pdev;
616
617 unsigned long state;
618
619 /* Some features need tri-state capability,
620 * thus the additional *_CAPABLE flags.
621 */
622 u32 flags;
174
175/* Tx Descriptors needed, worst case */
176#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
177#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
178
179/* wrapper around a pointer to a socket buffer,
180 * so a DMA handle can be stored along with the buffer */
181struct ixgbe_tx_buffer {

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615 struct pci_dev *pdev;
616
617 unsigned long state;
618
619 /* Some features need tri-state capability,
620 * thus the additional *_CAPABLE flags.
621 */
622 u32 flags;
623#define IXGBE_FLAG_MSI_ENABLED (u32)(1 << 1)
624#define IXGBE_FLAG_MSIX_ENABLED (u32)(1 << 3)
625#define IXGBE_FLAG_RX_1BUF_CAPABLE (u32)(1 << 4)
626#define IXGBE_FLAG_RX_PS_CAPABLE (u32)(1 << 5)
627#define IXGBE_FLAG_RX_PS_ENABLED (u32)(1 << 6)
628#define IXGBE_FLAG_DCA_ENABLED (u32)(1 << 8)
629#define IXGBE_FLAG_DCA_CAPABLE (u32)(1 << 9)
630#define IXGBE_FLAG_IMIR_ENABLED (u32)(1 << 10)
631#define IXGBE_FLAG_MQ_CAPABLE (u32)(1 << 11)
632#define IXGBE_FLAG_DCB_ENABLED (u32)(1 << 12)
633#define IXGBE_FLAG_VMDQ_CAPABLE (u32)(1 << 13)
634#define IXGBE_FLAG_VMDQ_ENABLED (u32)(1 << 14)
635#define IXGBE_FLAG_FAN_FAIL_CAPABLE (u32)(1 << 15)
636#define IXGBE_FLAG_NEED_LINK_UPDATE (u32)(1 << 16)
637#define IXGBE_FLAG_NEED_LINK_CONFIG (u32)(1 << 17)
638#define IXGBE_FLAG_FDIR_HASH_CAPABLE (u32)(1 << 18)
639#define IXGBE_FLAG_FDIR_PERFECT_CAPABLE (u32)(1 << 19)
640#define IXGBE_FLAG_FCOE_CAPABLE (u32)(1 << 20)
641#define IXGBE_FLAG_FCOE_ENABLED (u32)(1 << 21)
642#define IXGBE_FLAG_SRIOV_CAPABLE (u32)(1 << 22)
643#define IXGBE_FLAG_SRIOV_ENABLED (u32)(1 << 23)
623#define IXGBE_FLAG_MSI_ENABLED BIT(1)
624#define IXGBE_FLAG_MSIX_ENABLED BIT(3)
625#define IXGBE_FLAG_RX_1BUF_CAPABLE BIT(4)
626#define IXGBE_FLAG_RX_PS_CAPABLE BIT(5)
627#define IXGBE_FLAG_RX_PS_ENABLED BIT(6)
628#define IXGBE_FLAG_DCA_ENABLED BIT(8)
629#define IXGBE_FLAG_DCA_CAPABLE BIT(9)
630#define IXGBE_FLAG_IMIR_ENABLED BIT(10)
631#define IXGBE_FLAG_MQ_CAPABLE BIT(11)
632#define IXGBE_FLAG_DCB_ENABLED BIT(12)
633#define IXGBE_FLAG_VMDQ_CAPABLE BIT(13)
634#define IXGBE_FLAG_VMDQ_ENABLED BIT(14)
635#define IXGBE_FLAG_FAN_FAIL_CAPABLE BIT(15)
636#define IXGBE_FLAG_NEED_LINK_UPDATE BIT(16)
637#define IXGBE_FLAG_NEED_LINK_CONFIG BIT(17)
638#define IXGBE_FLAG_FDIR_HASH_CAPABLE BIT(18)
639#define IXGBE_FLAG_FDIR_PERFECT_CAPABLE BIT(19)
640#define IXGBE_FLAG_FCOE_CAPABLE BIT(20)
641#define IXGBE_FLAG_FCOE_ENABLED BIT(21)
642#define IXGBE_FLAG_SRIOV_CAPABLE BIT(22)
643#define IXGBE_FLAG_SRIOV_ENABLED BIT(23)
644#define IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE BIT(24)
645#define IXGBE_FLAG_RX_HWTSTAMP_ENABLED BIT(25)
646#define IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER BIT(26)
647
648 u32 flags2;
644#define IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE BIT(24)
645#define IXGBE_FLAG_RX_HWTSTAMP_ENABLED BIT(25)
646#define IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER BIT(26)
647
648 u32 flags2;
649#define IXGBE_FLAG2_RSC_CAPABLE (u32)(1 << 0)
650#define IXGBE_FLAG2_RSC_ENABLED (u32)(1 << 1)
651#define IXGBE_FLAG2_TEMP_SENSOR_CAPABLE (u32)(1 << 2)
652#define IXGBE_FLAG2_TEMP_SENSOR_EVENT (u32)(1 << 3)
653#define IXGBE_FLAG2_SEARCH_FOR_SFP (u32)(1 << 4)
654#define IXGBE_FLAG2_SFP_NEEDS_RESET (u32)(1 << 5)
655#define IXGBE_FLAG2_RESET_REQUESTED (u32)(1 << 6)
656#define IXGBE_FLAG2_FDIR_REQUIRES_REINIT (u32)(1 << 7)
657#define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP (u32)(1 << 8)
658#define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP (u32)(1 << 9)
659#define IXGBE_FLAG2_PTP_PPS_ENABLED (u32)(1 << 10)
660#define IXGBE_FLAG2_PHY_INTERRUPT (u32)(1 << 11)
649#define IXGBE_FLAG2_RSC_CAPABLE BIT(0)
650#define IXGBE_FLAG2_RSC_ENABLED BIT(1)
651#define IXGBE_FLAG2_TEMP_SENSOR_CAPABLE BIT(2)
652#define IXGBE_FLAG2_TEMP_SENSOR_EVENT BIT(3)
653#define IXGBE_FLAG2_SEARCH_FOR_SFP BIT(4)
654#define IXGBE_FLAG2_SFP_NEEDS_RESET BIT(5)
655#define IXGBE_FLAG2_RESET_REQUESTED BIT(6)
656#define IXGBE_FLAG2_FDIR_REQUIRES_REINIT BIT(7)
657#define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP BIT(8)
658#define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP BIT(9)
659#define IXGBE_FLAG2_PTP_PPS_ENABLED BIT(10)
660#define IXGBE_FLAG2_PHY_INTERRUPT BIT(11)
661#define IXGBE_FLAG2_VXLAN_REREG_NEEDED BIT(12)
662#define IXGBE_FLAG2_VLAN_PROMISC BIT(13)
663
664 /* Tx fast path data */
665 int num_tx_queues;
666 u16 tx_itr_setting;
667 u16 tx_work_limit;
668

--- 361 unchanged lines hidden --- 		661#define IXGBE_FLAG2_VXLAN_REREG_NEEDED BIT(12)
662#define IXGBE_FLAG2_VLAN_PROMISC BIT(13)
663
664 /* Tx fast path data */
665 int num_tx_queues;
666 u16 tx_itr_setting;
667 u16 tx_work_limit;
668

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