igc.h (46466ae3a105d9620e1355e33125a413b8c6ce18) igc.h (61572d5f8f91d8603d8db028e1ec9e18fc0ca245)
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2018 Intel Corporation */
3
4#ifndef _IGC_H_
5#define _IGC_H_
6
7#include <linux/kobject.h>
8#include <linux/pci.h>

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28#define MAX_ETYPE_FILTER 8
29#define IGC_RETA_SIZE 128
30
31/* SDP support */
32#define IGC_N_EXTTS 2
33#define IGC_N_PEROUT 2
34#define IGC_N_SDP 4
35
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2018 Intel Corporation */
3
4#ifndef _IGC_H_
5#define _IGC_H_
6
7#include <linux/kobject.h>
8#include <linux/pci.h>

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28#define MAX_ETYPE_FILTER 8
29#define IGC_RETA_SIZE 128
30
31/* SDP support */
32#define IGC_N_EXTTS 2
33#define IGC_N_PEROUT 2
34#define IGC_N_SDP 4
35
36#define MAX_FLEX_FILTER 32
37
36enum igc_mac_filter_type {
37 IGC_MAC_FILTER_TYPE_DST = 0,
38 IGC_MAC_FILTER_TYPE_SRC
39};
40
41struct igc_tx_queue_stats {
42 u64 packets;
43 u64 bytes;

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220 unsigned long ptp_tx_start;
221 unsigned int ptp_flags;
222 /* System time value lock */
223 spinlock_t tmreg_lock;
224 struct cyclecounter cc;
225 struct timecounter tc;
226 struct timespec64 prev_ptp_time; /* Pre-reset PTP clock */
227 ktime_t ptp_reset_start; /* Reset time in clock mono */
38enum igc_mac_filter_type {
39 IGC_MAC_FILTER_TYPE_DST = 0,
40 IGC_MAC_FILTER_TYPE_SRC
41};
42
43struct igc_tx_queue_stats {
44 u64 packets;
45 u64 bytes;

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222 unsigned long ptp_tx_start;
223 unsigned int ptp_flags;
224 /* System time value lock */
225 spinlock_t tmreg_lock;
226 struct cyclecounter cc;
227 struct timecounter tc;
228 struct timespec64 prev_ptp_time; /* Pre-reset PTP clock */
229 ktime_t ptp_reset_start; /* Reset time in clock mono */
230 struct system_time_snapshot snapshot;
228
229 char fw_version[32];
230
231 struct bpf_prog *xdp_prog;
232
233 bool pps_sys_wrap_on;
234
235 struct ptp_pin_desc sdp_config[IGC_N_SDP];

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283#define IGC_FLAG_MEDIA_RESET BIT(10)
284#define IGC_FLAG_MAS_ENABLE BIT(12)
285#define IGC_FLAG_HAS_MSIX BIT(13)
286#define IGC_FLAG_EEE BIT(14)
287#define IGC_FLAG_VLAN_PROMISC BIT(15)
288#define IGC_FLAG_RX_LEGACY BIT(16)
289#define IGC_FLAG_TSN_QBV_ENABLED BIT(17)
290
231
232 char fw_version[32];
233
234 struct bpf_prog *xdp_prog;
235
236 bool pps_sys_wrap_on;
237
238 struct ptp_pin_desc sdp_config[IGC_N_SDP];

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286#define IGC_FLAG_MEDIA_RESET BIT(10)
287#define IGC_FLAG_MAS_ENABLE BIT(12)
288#define IGC_FLAG_HAS_MSIX BIT(13)
289#define IGC_FLAG_EEE BIT(14)
290#define IGC_FLAG_VLAN_PROMISC BIT(15)
291#define IGC_FLAG_RX_LEGACY BIT(16)
292#define IGC_FLAG_TSN_QBV_ENABLED BIT(17)
293
294#define IGC_FLAG_TSN_ANY_ENABLED IGC_FLAG_TSN_QBV_ENABLED
295
291#define IGC_FLAG_RSS_FIELD_IPV4_UDP BIT(6)
292#define IGC_FLAG_RSS_FIELD_IPV6_UDP BIT(7)
293
294#define IGC_MRQC_ENABLE_RSS_MQ 0x00000002
295#define IGC_MRQC_RSS_FIELD_IPV4_UDP 0x00400000
296#define IGC_MRQC_RSS_FIELD_IPV6_UDP 0x00800000
297
298/* Interrupt defines */

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471 char name[IFNAMSIZ + 9];
472 struct net_device poll_dev;
473
474 /* for dynamic allocation of rings associated with this q_vector */
475 struct igc_ring ring[] ____cacheline_internodealigned_in_smp;
476};
477
478enum igc_filter_match_flags {
296#define IGC_FLAG_RSS_FIELD_IPV4_UDP BIT(6)
297#define IGC_FLAG_RSS_FIELD_IPV6_UDP BIT(7)
298
299#define IGC_MRQC_ENABLE_RSS_MQ 0x00000002
300#define IGC_MRQC_RSS_FIELD_IPV4_UDP 0x00400000
301#define IGC_MRQC_RSS_FIELD_IPV6_UDP 0x00800000
302
303/* Interrupt defines */

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476 char name[IFNAMSIZ + 9];
477 struct net_device poll_dev;
478
479 /* for dynamic allocation of rings associated with this q_vector */
480 struct igc_ring ring[] ____cacheline_internodealigned_in_smp;
481};
482
483enum igc_filter_match_flags {
479 IGC_FILTER_FLAG_ETHER_TYPE = 0x1,
480 IGC_FILTER_FLAG_VLAN_TCI = 0x2,
481 IGC_FILTER_FLAG_SRC_MAC_ADDR = 0x4,
482 IGC_FILTER_FLAG_DST_MAC_ADDR = 0x8,
484 IGC_FILTER_FLAG_ETHER_TYPE = BIT(0),
485 IGC_FILTER_FLAG_VLAN_TCI = BIT(1),
486 IGC_FILTER_FLAG_SRC_MAC_ADDR = BIT(2),
487 IGC_FILTER_FLAG_DST_MAC_ADDR = BIT(3),
488 IGC_FILTER_FLAG_USER_DATA = BIT(4),
489 IGC_FILTER_FLAG_VLAN_ETYPE = BIT(5),
483};
484
485struct igc_nfc_filter {
486 u8 match_flags;
487 u16 etype;
490};
491
492struct igc_nfc_filter {
493 u8 match_flags;
494 u16 etype;
495 __be16 vlan_etype;
488 u16 vlan_tci;
489 u8 src_addr[ETH_ALEN];
490 u8 dst_addr[ETH_ALEN];
496 u16 vlan_tci;
497 u8 src_addr[ETH_ALEN];
498 u8 dst_addr[ETH_ALEN];
499 u8 user_data[8];
500 u8 user_mask[8];
501 u8 flex_index;
502 u8 rx_queue;
503 u8 prio;
504 u8 immediate_irq;
505 u8 drop;
491};
492
493struct igc_nfc_rule {
494 struct list_head list;
495 struct igc_nfc_filter filter;
496 u32 location;
497 u16 action;
506};
507
508struct igc_nfc_rule {
509 struct list_head list;
510 struct igc_nfc_filter filter;
511 u32 location;
512 u16 action;
513 bool flex;
498};
499
514};
515
500/* IGC supports a total of 32 NFC rules: 16 MAC address based,, 8 VLAN priority
501 * based, and 8 ethertype based.
516/* IGC supports a total of 32 NFC rules: 16 MAC address based, 8 VLAN priority
517 * based, 8 ethertype based and 32 Flex filter based rules.
502 */
518 */
503#define IGC_MAX_RXNFC_RULES 32
519#define IGC_MAX_RXNFC_RULES 64
504
520
521struct igc_flex_filter {
522 u8 index;
523 u8 data[128];
524 u8 mask[16];
525 u8 length;
526 u8 rx_queue;
527 u8 prio;
528 u8 immediate_irq;
529 u8 drop;
530};
531
505/* igc_desc_unused - calculate if we have unused descriptors */
506static inline u16 igc_desc_unused(const struct igc_ring *ring)
507{
508 u16 ntc = ring->next_to_clean;
509 u16 ntu = ring->next_to_use;
510
511 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
512}

--- 99 unchanged lines hidden --- 		532/* igc_desc_unused - calculate if we have unused descriptors */
533static inline u16 igc_desc_unused(const struct igc_ring *ring)
534{
535 u16 ntc = ring->next_to_clean;
536 u16 ntu = ring->next_to_use;
537
538 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
539}

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