bcmgenet.h (1ac731c529cd4d6adbce134754b51ff7d822b145) bcmgenet.h (d80a52335374e484a4ff2afdc9af843e73273945)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2014-2020 Broadcom
4 */
5
6#ifndef __BCMGENET_H__
7#define __BCMGENET_H__
8

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640 /* WOL */
641 struct clk *clk_wol;
642 u32 wolopts;
643 u8 sopass[SOPASS_MAX];
644 bool wol_active;
645
646 struct bcmgenet_mib_counters mib;
647
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2014-2020 Broadcom
4 */
5
6#ifndef __BCMGENET_H__
7#define __BCMGENET_H__
8

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640 /* WOL */
641 struct clk *clk_wol;
642 u32 wolopts;
643 u8 sopass[SOPASS_MAX];
644 bool wol_active;
645
646 struct bcmgenet_mib_counters mib;
647
648 struct ethtool_eee eee;
648 struct ethtool_keee eee;
649};
650
651#define GENET_IO_MACRO(name, offset) \
652static inline u32 bcmgenet_##name##_readl(struct bcmgenet_priv *priv, \
653 u32 off) \
654{ \
655 /* MIPS chips strapped for BE will automagically configure the \
656 * peripheral registers for CPU-native byte order. \

--- 53 unchanged lines hidden --- 		649};
650
651#define GENET_IO_MACRO(name, offset) \
652static inline u32 bcmgenet_##name##_readl(struct bcmgenet_priv *priv, \
653 u32 off) \
654{ \
655 /* MIPS chips strapped for BE will automagically configure the \
656 * peripheral registers for CPU-native byte order. \

--- 53 unchanged lines hidden ---