ag71xx.c (ff36e78fdb251b9fa65028554689806961e011eb) ag71xx.c (892e09153fa3564fcbf9f422760b61eba48c123e)
1// SPDX-License-Identifier: GPL-2.0
2/* Atheros AR71xx built-in ethernet mac driver
3 *
4 * Copyright (C) 2019 Oleksij Rempel <o.rempel@pengutronix.de>
5 *
6 * List of authors contributed to this driver before mainlining:
7 * Alexander Couzens <lynxis@fe80.eu>
8 * Christian Lamparter <chunkeey@gmail.com>

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27 * Imre Kaloz <kaloz@openwrt.org>
28 */
29
30#include <linux/if_vlan.h>
31#include <linux/mfd/syscon.h>
32#include <linux/of_mdio.h>
33#include <linux/of_net.h>
34#include <linux/of_platform.h>
1// SPDX-License-Identifier: GPL-2.0
2/* Atheros AR71xx built-in ethernet mac driver
3 *
4 * Copyright (C) 2019 Oleksij Rempel <o.rempel@pengutronix.de>
5 *
6 * List of authors contributed to this driver before mainlining:
7 * Alexander Couzens <lynxis@fe80.eu>
8 * Christian Lamparter <chunkeey@gmail.com>

--- 18 unchanged lines hidden (view full) ---

27 * Imre Kaloz <kaloz@openwrt.org>
28 */
29
30#include <linux/if_vlan.h>
31#include <linux/mfd/syscon.h>
32#include <linux/of_mdio.h>
33#include <linux/of_net.h>
34#include <linux/of_platform.h>
35#include <linux/phylink.h>
35#include <linux/regmap.h>
36#include <linux/reset.h>
37#include <linux/clk.h>
38#include <linux/io.h>
39
40/* For our NAPI weight bigger does *NOT* mean better - it means more
41 * D-cache misses and lots more wasted cycles than we'll ever
42 * possibly gain from saving instructions.

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309
310 /* From this point onwards we're not looking at per-packet fields. */
311 void __iomem *mac_base;
312
313 struct ag71xx_desc *stop_desc;
314 dma_addr_t stop_desc_dma;
315
316 phy_interface_t phy_if_mode;
36#include <linux/regmap.h>
37#include <linux/reset.h>
38#include <linux/clk.h>
39#include <linux/io.h>
40
41/* For our NAPI weight bigger does *NOT* mean better - it means more
42 * D-cache misses and lots more wasted cycles than we'll ever
43 * possibly gain from saving instructions.

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310
311 /* From this point onwards we're not looking at per-packet fields. */
312 void __iomem *mac_base;
313
314 struct ag71xx_desc *stop_desc;
315 dma_addr_t stop_desc_dma;
316
317 phy_interface_t phy_if_mode;
318 struct phylink *phylink;
319 struct phylink_config phylink_config;
317
318 struct delayed_work restart_work;
319 struct timer_list oom_timer;
320
321 struct reset_control *mac_reset;
322
323 u32 fifodata[3];
324 int mac_idx;

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840 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE);
841
842 /* enable interrupts */
843 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT);
844
845 netif_wake_queue(ag->ndev);
846}
847
320
321 struct delayed_work restart_work;
322 struct timer_list oom_timer;
323
324 struct reset_control *mac_reset;
325
326 u32 fifodata[3];
327 int mac_idx;

--- 515 unchanged lines hidden (view full) ---

843 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE);
844
845 /* enable interrupts */
846 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT);
847
848 netif_wake_queue(ag->ndev);
849}
850
848static void ag71xx_link_adjust(struct ag71xx *ag, bool update)
851static void ag71xx_mac_config(struct phylink_config *config, unsigned int mode,
852 const struct phylink_link_state *state)
849{
853{
850 struct phy_device *phydev = ag->ndev->phydev;
851 u32 cfg2;
852 u32 ifctl;
853 u32 fifo5;
854 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev));
854
855
855 if (!phydev->link && update) {
856 ag71xx_hw_stop(ag);
856 if (phylink_autoneg_inband(mode))
857 return;
857 return;
858 }
859
860 if (!ag71xx_is(ag, AR7100) && !ag71xx_is(ag, AR9130))
861 ag71xx_fast_reset(ag);
862
858
859 if (!ag71xx_is(ag, AR7100) && !ag71xx_is(ag, AR9130))
860 ag71xx_fast_reset(ag);
861
862 if (ag->tx_ring.desc_split) {
863 ag->fifodata[2] &= 0xffff;
864 ag->fifodata[2] |= ((2048 - ag->tx_ring.desc_split) / 4) << 16;
865 }
866
867 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]);
868}
869
870static void ag71xx_mac_validate(struct phylink_config *config,
871 unsigned long *supported,
872 struct phylink_link_state *state)
873{
874 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
875
876 if (state->interface != PHY_INTERFACE_MODE_NA &&
877 state->interface != PHY_INTERFACE_MODE_GMII &&
878 state->interface != PHY_INTERFACE_MODE_MII) {
879 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
880 return;
881 }
882
883 phylink_set(mask, MII);
884
885 phylink_set(mask, Autoneg);
886 phylink_set(mask, 10baseT_Half);
887 phylink_set(mask, 10baseT_Full);
888 phylink_set(mask, 100baseT_Half);
889 phylink_set(mask, 100baseT_Full);
890
891 if (state->interface == PHY_INTERFACE_MODE_NA ||
892 state->interface == PHY_INTERFACE_MODE_GMII) {
893 phylink_set(mask, 1000baseT_Full);
894 phylink_set(mask, 1000baseX_Full);
895 }
896
897 bitmap_and(supported, supported, mask,
898 __ETHTOOL_LINK_MODE_MASK_NBITS);
899 bitmap_and(state->advertising, state->advertising, mask,
900 __ETHTOOL_LINK_MODE_MASK_NBITS);
901}
902
903static void ag71xx_mac_pcs_get_state(struct phylink_config *config,
904 struct phylink_link_state *state)
905{
906 state->link = 0;
907}
908
909static void ag71xx_mac_an_restart(struct phylink_config *config)
910{
911 /* Not Supported */
912}
913
914static void ag71xx_mac_link_down(struct phylink_config *config,
915 unsigned int mode, phy_interface_t interface)
916{
917 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev));
918
919 ag71xx_hw_stop(ag);
920}
921
922static void ag71xx_mac_link_up(struct phylink_config *config,
923 struct phy_device *phy,
924 unsigned int mode, phy_interface_t interface,
925 int speed, int duplex,
926 bool tx_pause, bool rx_pause)
927{
928 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev));
929 u32 cfg2;
930 u32 ifctl;
931 u32 fifo5;
932
863 cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
864 cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
933 cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
934 cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
865 cfg2 |= (phydev->duplex) ? MAC_CFG2_FDX : 0;
935 cfg2 |= duplex ? MAC_CFG2_FDX : 0;
866
867 ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
868 ifctl &= ~(MAC_IFCTL_SPEED);
869
870 fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
871 fifo5 &= ~FIFO_CFG5_BM;
872
936
937 ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
938 ifctl &= ~(MAC_IFCTL_SPEED);
939
940 fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
941 fifo5 &= ~FIFO_CFG5_BM;
942
873 switch (phydev->speed) {
943 switch (speed) {
874 case SPEED_1000:
875 cfg2 |= MAC_CFG2_IF_1000;
876 fifo5 |= FIFO_CFG5_BM;
877 break;
878 case SPEED_100:
879 cfg2 |= MAC_CFG2_IF_10_100;
880 ifctl |= MAC_IFCTL_SPEED;
881 break;
882 case SPEED_10:
883 cfg2 |= MAC_CFG2_IF_10_100;
884 break;
885 default:
944 case SPEED_1000:
945 cfg2 |= MAC_CFG2_IF_1000;
946 fifo5 |= FIFO_CFG5_BM;
947 break;
948 case SPEED_100:
949 cfg2 |= MAC_CFG2_IF_10_100;
950 ifctl |= MAC_IFCTL_SPEED;
951 break;
952 case SPEED_10:
953 cfg2 |= MAC_CFG2_IF_10_100;
954 break;
955 default:
886 WARN(1, "not supported speed %i\n", phydev->speed);
887 return;
888 }
889
956 return;
957 }
958
890 if (ag->tx_ring.desc_split) {
891 ag->fifodata[2] &= 0xffff;
892 ag->fifodata[2] |= ((2048 - ag->tx_ring.desc_split) / 4) << 16;
893 }
894
895 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]);
896
897 ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
898 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
899 ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
900
901 ag71xx_hw_start(ag);
959 ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
960 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
961 ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
962
963 ag71xx_hw_start(ag);
902
903 if (update)
904 phy_print_status(phydev);
905}
906
964}
965
907static void ag71xx_phy_link_adjust(struct net_device *ndev)
908{
909 struct ag71xx *ag = netdev_priv(ndev);
966static const struct phylink_mac_ops ag71xx_phylink_mac_ops = {
967 .validate = ag71xx_mac_validate,
968 .mac_pcs_get_state = ag71xx_mac_pcs_get_state,
969 .mac_an_restart = ag71xx_mac_an_restart,
970 .mac_config = ag71xx_mac_config,
971 .mac_link_down = ag71xx_mac_link_down,
972 .mac_link_up = ag71xx_mac_link_up,
973};
910
974
911 ag71xx_link_adjust(ag, true);
912}
913
914static int ag71xx_phy_connect(struct ag71xx *ag)
975static int ag71xx_phylink_setup(struct ag71xx *ag)
915{
976{
916 struct device_node *np = ag->pdev->dev.of_node;
917 struct net_device *ndev = ag->ndev;
918 struct device_node *phy_node;
919 struct phy_device *phydev;
920 int ret;
977 struct phylink *phylink;
921
978
922 if (of_phy_is_fixed_link(np)) {
923 ret = of_phy_register_fixed_link(np);
924 if (ret < 0) {
925 netif_err(ag, probe, ndev, "Failed to register fixed PHY link: %d\n",
926 ret);
927 return ret;
928 }
979 ag->phylink_config.dev = &ag->ndev->dev;
980 ag->phylink_config.type = PHYLINK_NETDEV;
929
981
930 phy_node = of_node_get(np);
931 } else {
932 phy_node = of_parse_phandle(np, "phy-handle", 0);
933 }
982 phylink = phylink_create(&ag->phylink_config, ag->pdev->dev.fwnode,
983 ag->phy_if_mode, &ag71xx_phylink_mac_ops);
984 if (IS_ERR(phylink))
985 return PTR_ERR(phylink);
934
986
935 if (!phy_node) {
936 netif_err(ag, probe, ndev, "Could not find valid phy node\n");
937 return -ENODEV;
938 }
939
940 phydev = of_phy_connect(ag->ndev, phy_node, ag71xx_phy_link_adjust,
941 0, ag->phy_if_mode);
942
943 of_node_put(phy_node);
944
945 if (!phydev) {
946 netif_err(ag, probe, ndev, "Could not connect to PHY device\n");
947 return -ENODEV;
948 }
949
950 phy_attached_info(phydev);
951
987 ag->phylink = phylink;
952 return 0;
953}
954
955static void ag71xx_ring_tx_clean(struct ag71xx *ag)
956{
957 struct ag71xx_ring *ring = &ag->tx_ring;
958 int ring_mask = BIT(ring->order) - 1;
959 u32 bytes_compl = 0, pkts_compl = 0;

--- 274 unchanged lines hidden (view full) ---

1234}
1235
1236static int ag71xx_open(struct net_device *ndev)
1237{
1238 struct ag71xx *ag = netdev_priv(ndev);
1239 unsigned int max_frame_len;
1240 int ret;
1241
988 return 0;
989}
990
991static void ag71xx_ring_tx_clean(struct ag71xx *ag)
992{
993 struct ag71xx_ring *ring = &ag->tx_ring;
994 int ring_mask = BIT(ring->order) - 1;
995 u32 bytes_compl = 0, pkts_compl = 0;

--- 274 unchanged lines hidden (view full) ---

1270}
1271
1272static int ag71xx_open(struct net_device *ndev)
1273{
1274 struct ag71xx *ag = netdev_priv(ndev);
1275 unsigned int max_frame_len;
1276 int ret;
1277
1278 ret = phylink_of_phy_connect(ag->phylink, ag->pdev->dev.of_node, 0);
1279 if (ret) {
1280 netif_err(ag, link, ndev, "phylink_of_phy_connect filed with err: %i\n",
1281 ret);
1282 goto err;
1283 }
1284
1242 max_frame_len = ag71xx_max_frame_len(ndev->mtu);
1243 ag->rx_buf_size =
1244 SKB_DATA_ALIGN(max_frame_len + NET_SKB_PAD + NET_IP_ALIGN);
1245
1246 /* setup max frame length */
1247 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, max_frame_len);
1248 ag71xx_hw_set_macaddr(ag, ndev->dev_addr);
1249
1250 ret = ag71xx_hw_enable(ag);
1251 if (ret)
1252 goto err;
1253
1285 max_frame_len = ag71xx_max_frame_len(ndev->mtu);
1286 ag->rx_buf_size =
1287 SKB_DATA_ALIGN(max_frame_len + NET_SKB_PAD + NET_IP_ALIGN);
1288
1289 /* setup max frame length */
1290 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, max_frame_len);
1291 ag71xx_hw_set_macaddr(ag, ndev->dev_addr);
1292
1293 ret = ag71xx_hw_enable(ag);
1294 if (ret)
1295 goto err;
1296
1254 ret = ag71xx_phy_connect(ag);
1255 if (ret)
1256 goto err;
1297 phylink_start(ag->phylink);
1257
1298
1258 phy_start(ndev->phydev);
1259
1260 return 0;
1261
1262err:
1263 ag71xx_rings_cleanup(ag);
1264 return ret;
1265}
1266
1267static int ag71xx_stop(struct net_device *ndev)
1268{
1269 struct ag71xx *ag = netdev_priv(ndev);
1270
1299 return 0;
1300
1301err:
1302 ag71xx_rings_cleanup(ag);
1303 return ret;
1304}
1305
1306static int ag71xx_stop(struct net_device *ndev)
1307{
1308 struct ag71xx *ag = netdev_priv(ndev);
1309
1271 phy_stop(ndev->phydev);
1272 phy_disconnect(ndev->phydev);
1310 phylink_stop(ag->phylink);
1311 phylink_disconnect_phy(ag->phylink);
1273 ag71xx_hw_disable(ag);
1274
1275 return 0;
1276}
1277
1278static int ag71xx_fill_dma_desc(struct ag71xx_ring *ring, u32 addr, int len)
1279{
1280 int i, ring_mask, ndesc, split;

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1409
1410 schedule_delayed_work(&ag->restart_work, 1);
1411}
1412
1413static void ag71xx_restart_work_func(struct work_struct *work)
1414{
1415 struct ag71xx *ag = container_of(work, struct ag71xx,
1416 restart_work.work);
1312 ag71xx_hw_disable(ag);
1313
1314 return 0;
1315}
1316
1317static int ag71xx_fill_dma_desc(struct ag71xx_ring *ring, u32 addr, int len)
1318{
1319 int i, ring_mask, ndesc, split;

--- 128 unchanged lines hidden (view full) ---

1448
1449 schedule_delayed_work(&ag->restart_work, 1);
1450}
1451
1452static void ag71xx_restart_work_func(struct work_struct *work)
1453{
1454 struct ag71xx *ag = container_of(work, struct ag71xx,
1455 restart_work.work);
1417 struct net_device *ndev = ag->ndev;
1418
1419 rtnl_lock();
1420 ag71xx_hw_disable(ag);
1421 ag71xx_hw_enable(ag);
1456
1457 rtnl_lock();
1458 ag71xx_hw_disable(ag);
1459 ag71xx_hw_enable(ag);
1422 if (ndev->phydev->link)
1423 ag71xx_link_adjust(ag, false);
1460
1461 phylink_stop(ag->phylink);
1462 phylink_start(ag->phylink);
1463
1424 rtnl_unlock();
1425}
1426
1427static int ag71xx_rx_packets(struct ag71xx *ag, int limit)
1428{
1429 struct net_device *ndev = ag->ndev;
1430 int ring_mask, ring_size, done = 0;
1431 unsigned int pktlen_mask, offset;

--- 322 unchanged lines hidden (view full) ---

1754 ag71xx_hw_init(ag);
1755
1756 err = ag71xx_mdio_probe(ag);
1757 if (err)
1758 goto err_put_clk;
1759
1760 platform_set_drvdata(pdev, ndev);
1761
1464 rtnl_unlock();
1465}
1466
1467static int ag71xx_rx_packets(struct ag71xx *ag, int limit)
1468{
1469 struct net_device *ndev = ag->ndev;
1470 int ring_mask, ring_size, done = 0;
1471 unsigned int pktlen_mask, offset;

--- 322 unchanged lines hidden (view full) ---

1794 ag71xx_hw_init(ag);
1795
1796 err = ag71xx_mdio_probe(ag);
1797 if (err)
1798 goto err_put_clk;
1799
1800 platform_set_drvdata(pdev, ndev);
1801
1802 err = ag71xx_phylink_setup(ag);
1803 if (err) {
1804 netif_err(ag, probe, ndev, "failed to setup phylink (%d)\n", err);
1805 goto err_mdio_remove;
1806 }
1807
1762 err = register_netdev(ndev);
1763 if (err) {
1764 netif_err(ag, probe, ndev, "unable to register net device\n");
1765 platform_set_drvdata(pdev, NULL);
1766 goto err_mdio_remove;
1767 }
1768
1769 netif_info(ag, probe, ndev, "Atheros AG71xx at 0x%08lx, irq %d, mode:%s\n",

--- 124 unchanged lines hidden ---
1808 err = register_netdev(ndev);
1809 if (err) {
1810 netif_err(ag, probe, ndev, "unable to register net device\n");
1811 platform_set_drvdata(pdev, NULL);
1812 goto err_mdio_remove;
1813 }
1814
1815 netif_info(ag, probe, ndev, "Atheros AG71xx at 0x%08lx, irq %d, mode:%s\n",

--- 124 unchanged lines hidden ---