chip.c (7ffe939dd9c71e149f31817394b70b52b4067304) chip.c (720c6343ef67de926251b0c1b3bb0b76d2cff946)
1/*
2 * Marvell 88e6xxx Ethernet switch single-chip support
3 *
4 * Copyright (c) 2008 Marvell Semiconductor
5 *
6 * Copyright (c) 2015 CMC Electronics, Inc.
7 * Added support for VLAN Table Unit operations
8 *

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2692
2693 err = mv88e6xxx_g1_write(chip, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]);
2694 if (err)
2695 return err;
2696
2697 return 0;
2698}
2699
1/*
2 * Marvell 88e6xxx Ethernet switch single-chip support
3 *
4 * Copyright (c) 2008 Marvell Semiconductor
5 *
6 * Copyright (c) 2015 CMC Electronics, Inc.
7 * Added support for VLAN Table Unit operations
8 *

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2692
2693 err = mv88e6xxx_g1_write(chip, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]);
2694 if (err)
2695 return err;
2696
2697 return 0;
2698}
2699
2700static int mv88e6xxx_g1_set_age_time(struct mv88e6xxx_chip *chip,
2701 unsigned int msecs)
2702{
2703 const unsigned int coeff = chip->info->age_time_coeff;
2704 const unsigned int min = 0x01 * coeff;
2705 const unsigned int max = 0xff * coeff;
2706 u8 age_time;
2707 u16 val;
2708 int err;
2709
2710 if (msecs < min || msecs > max)
2711 return -ERANGE;
2712
2713 /* Round to nearest multiple of coeff */
2714 age_time = (msecs + coeff / 2) / coeff;
2715
2716 err = mv88e6xxx_g1_read(chip, GLOBAL_ATU_CONTROL, &val);
2717 if (err)
2718 return err;
2719
2720 /* AgeTime is 11:4 bits */
2721 val &= ~0xff0;
2722 val |= age_time << 4;
2723
2724 return mv88e6xxx_g1_write(chip, GLOBAL_ATU_CONTROL, val);
2725}
2726
2727static int mv88e6xxx_set_ageing_time(struct dsa_switch *ds,
2728 unsigned int ageing_time)
2729{
2730 struct mv88e6xxx_chip *chip = ds->priv;
2731 int err;
2732
2733 mutex_lock(&chip->reg_lock);
2700static int mv88e6xxx_set_ageing_time(struct dsa_switch *ds,
2701 unsigned int ageing_time)
2702{
2703 struct mv88e6xxx_chip *chip = ds->priv;
2704 int err;
2705
2706 mutex_lock(&chip->reg_lock);
2734 err = mv88e6xxx_g1_set_age_time(chip, ageing_time);
2707 err = mv88e6xxx_g1_atu_set_age_time(chip, ageing_time);
2735 mutex_unlock(&chip->reg_lock);
2736
2737 return err;
2738}
2739
2740static int mv88e6xxx_g1_setup(struct mv88e6xxx_chip *chip)
2741{
2742 struct dsa_switch *ds = chip->ds;

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2778 * enable address learn messages to be sent to all message
2779 * ports.
2780 */
2781 err = mv88e6xxx_g1_write(chip, GLOBAL_ATU_CONTROL,
2782 GLOBAL_ATU_CONTROL_LEARN2ALL);
2783 if (err)
2784 return err;
2785
2708 mutex_unlock(&chip->reg_lock);
2709
2710 return err;
2711}
2712
2713static int mv88e6xxx_g1_setup(struct mv88e6xxx_chip *chip)
2714{
2715 struct dsa_switch *ds = chip->ds;

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2751 * enable address learn messages to be sent to all message
2752 * ports.
2753 */
2754 err = mv88e6xxx_g1_write(chip, GLOBAL_ATU_CONTROL,
2755 GLOBAL_ATU_CONTROL_LEARN2ALL);
2756 if (err)
2757 return err;
2758
2786 err = mv88e6xxx_g1_set_age_time(chip, 300000);
2759 err = mv88e6xxx_g1_atu_set_age_time(chip, 300000);
2787 if (err)
2788 return err;
2789
2790 /* Clear all ATU entries */
2791 err = _mv88e6xxx_atu_flush(chip, 0, true);
2792 if (err)
2793 return err;
2794

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2761 return err;
2762
2763 /* Clear all ATU entries */
2764 err = _mv88e6xxx_atu_flush(chip, 0, true);
2765 if (err)
2766 return err;
2767

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