atmel-mci.c (594ce0b8a998aa4d05827cd7c0d0dcec9a1e3ae2) atmel-mci.c (921c87ba3893b5d3608e7f248366266b40b86c75)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Atmel MultiMedia Card Interface driver
4 *
5 * Copyright (C) 2004-2008 Atmel Corporation
6 */
7#include <linux/blkdev.h>
8#include <linux/clk.h>

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28
29#include <linux/mmc/host.h>
30#include <linux/mmc/sdio.h>
31
32#include <linux/atmel_pdc.h>
33#include <linux/pm.h>
34#include <linux/pm_runtime.h>
35#include <linux/pinctrl/consumer.h>
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Atmel MultiMedia Card Interface driver
4 *
5 * Copyright (C) 2004-2008 Atmel Corporation
6 */
7#include <linux/blkdev.h>
8#include <linux/clk.h>

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28
29#include <linux/mmc/host.h>
30#include <linux/mmc/sdio.h>
31
32#include <linux/atmel_pdc.h>
33#include <linux/pm.h>
34#include <linux/pm_runtime.h>
35#include <linux/pinctrl/consumer.h>
36#include <linux/workqueue.h>
36
37#include <asm/cacheflush.h>
38#include <asm/io.h>
39#include <asm/unaligned.h>
40
41#define ATMCI_MAX_NR_SLOTS 2
42
43/*

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267 * @dma_conf: Configuration for the DMA slave
268 * @cmd_status: Snapshot of SR taken upon completion of the current
269 * command. Only valid when EVENT_CMD_COMPLETE is pending.
270 * @data_status: Snapshot of SR taken upon completion of the current
271 * data transfer. Only valid when EVENT_DATA_COMPLETE or
272 * EVENT_DATA_ERROR is pending.
273 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
274 * to be sent.
37
38#include <asm/cacheflush.h>
39#include <asm/io.h>
40#include <asm/unaligned.h>
41
42#define ATMCI_MAX_NR_SLOTS 2
43
44/*

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268 * @dma_conf: Configuration for the DMA slave
269 * @cmd_status: Snapshot of SR taken upon completion of the current
270 * command. Only valid when EVENT_CMD_COMPLETE is pending.
271 * @data_status: Snapshot of SR taken upon completion of the current
272 * data transfer. Only valid when EVENT_DATA_COMPLETE or
273 * EVENT_DATA_ERROR is pending.
274 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
275 * to be sent.
275 * @tasklet: Tasklet running the request state machine.
276 * @bh_work: Work running the request state machine.
276 * @pending_events: Bitmask of events flagged by the interrupt handler
277 * @pending_events: Bitmask of events flagged by the interrupt handler
277 * to be processed by the tasklet.
278 * to be processed by the work.
278 * @completed_events: Bitmask of events which the state machine has
279 * processed.
279 * @completed_events: Bitmask of events which the state machine has
280 * processed.
280 * @state: Tasklet state.
281 * @state: Work state.
281 * @queue: List of slots waiting for access to the controller.
282 * @need_clock_update: Update the clock rate before the next request.
283 * @need_reset: Reset controller before next request.
284 * @timer: Timer to balance the data timeout error flag which cannot rise.
285 * @mode_reg: Value of the MR register.
286 * @cfg_reg: Value of the CFG register.
287 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
288 * rate and timeout calculations.

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347 struct atmel_mci_dma dma;
348 struct dma_chan *data_chan;
349 struct dma_slave_config dma_conf;
350
351 u32 cmd_status;
352 u32 data_status;
353 u32 stop_cmdr;
354
282 * @queue: List of slots waiting for access to the controller.
283 * @need_clock_update: Update the clock rate before the next request.
284 * @need_reset: Reset controller before next request.
285 * @timer: Timer to balance the data timeout error flag which cannot rise.
286 * @mode_reg: Value of the MR register.
287 * @cfg_reg: Value of the CFG register.
288 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
289 * rate and timeout calculations.

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348 struct atmel_mci_dma dma;
349 struct dma_chan *data_chan;
350 struct dma_slave_config dma_conf;
351
352 u32 cmd_status;
353 u32 data_status;
354 u32 stop_cmdr;
355
355 struct tasklet_struct tasklet;
356 struct work_struct bh_work;
356 unsigned long pending_events;
357 unsigned long completed_events;
358 enum atmel_mci_state state;
359 struct list_head queue;
360
361 bool need_clock_update;
362 bool need_reset;
363 struct timer_list timer;

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730 host->stop_transfer(host);
731 } else {
732 host->mrq->cmd->error = -ETIMEDOUT;
733 host->cmd = NULL;
734 }
735 host->need_reset = 1;
736 host->state = STATE_END_REQUEST;
737 smp_wmb();
357 unsigned long pending_events;
358 unsigned long completed_events;
359 enum atmel_mci_state state;
360 struct list_head queue;
361
362 bool need_clock_update;
363 bool need_reset;
364 struct timer_list timer;

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731 host->stop_transfer(host);
732 } else {
733 host->mrq->cmd->error = -ETIMEDOUT;
734 host->cmd = NULL;
735 }
736 host->need_reset = 1;
737 host->state = STATE_END_REQUEST;
738 smp_wmb();
738 tasklet_schedule(&host->tasklet);
739 queue_work(system_bh_wq, &host->bh_work);
739}
740
741static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host,
742 unsigned int ns)
743{
744 /*
745 * It is easier here to use us instead of ns for the timeout,
746 * it prevents from overflows during calculation.

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953 sg_copy_from_buffer(host->data->sg, host->data->sg_len,
954 host->buffer, transfer_size);
955 }
956
957 atmci_pdc_cleanup(host);
958
959 dev_dbg(dev, "(%s) set pending xfer complete\n", __func__);
960 atmci_set_pending(host, EVENT_XFER_COMPLETE);
740}
741
742static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host,
743 unsigned int ns)
744{
745 /*
746 * It is easier here to use us instead of ns for the timeout,
747 * it prevents from overflows during calculation.

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954 sg_copy_from_buffer(host->data->sg, host->data->sg_len,
955 host->buffer, transfer_size);
956 }
957
958 atmci_pdc_cleanup(host);
959
960 dev_dbg(dev, "(%s) set pending xfer complete\n", __func__);
961 atmci_set_pending(host, EVENT_XFER_COMPLETE);
961 tasklet_schedule(&host->tasklet);
962 queue_work(system_bh_wq, &host->bh_work);
962}
963
964static void atmci_dma_cleanup(struct atmel_mci *host)
965{
966 struct mmc_data *data = host->data;
967
968 if (data)
969 dma_unmap_sg(host->dma.chan->device->dev,
970 data->sg, data->sg_len,
971 mmc_get_dma_dir(data));
972}
973
974/*
963}
964
965static void atmci_dma_cleanup(struct atmel_mci *host)
966{
967 struct mmc_data *data = host->data;
968
969 if (data)
970 dma_unmap_sg(host->dma.chan->device->dev,
971 data->sg, data->sg_len,
972 mmc_get_dma_dir(data));
973}
974
975/*
975 * This function is called by the DMA driver from tasklet context.
976 * This function is called by the DMA driver from bh context.
976 */
977static void atmci_dma_complete(void *arg)
978{
979 struct atmel_mci *host = arg;
980 struct mmc_data *data = host->data;
981 struct device *dev = host->dev;
982
983 dev_vdbg(dev, "DMA complete\n");

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990
991 /*
992 * If the card was removed, data will be NULL. No point trying
993 * to send the stop command or waiting for NBUSY in this case.
994 */
995 if (data) {
996 dev_dbg(dev, "(%s) set pending xfer complete\n", __func__);
997 atmci_set_pending(host, EVENT_XFER_COMPLETE);
977 */
978static void atmci_dma_complete(void *arg)
979{
980 struct atmel_mci *host = arg;
981 struct mmc_data *data = host->data;
982 struct device *dev = host->dev;
983
984 dev_vdbg(dev, "DMA complete\n");

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991
992 /*
993 * If the card was removed, data will be NULL. No point trying
994 * to send the stop command or waiting for NBUSY in this case.
995 */
996 if (data) {
997 dev_dbg(dev, "(%s) set pending xfer complete\n", __func__);
998 atmci_set_pending(host, EVENT_XFER_COMPLETE);
998 tasklet_schedule(&host->tasklet);
999 queue_work(system_bh_wq, &host->bh_work);
999
1000 /*
1001 * Regardless of what the documentation says, we have
1002 * to wait for NOTBUSY even after block read
1003 * operations.
1004 *
1005 * When the DMA transfer is complete, the controller
1006 * may still be reading the CRC from the card, i.e.
1007 * the data transfer is still in progress and we
1008 * haven't seen all the potential error bits yet.
1009 *
1010 * The interrupt handler will schedule a different
1000
1001 /*
1002 * Regardless of what the documentation says, we have
1003 * to wait for NOTBUSY even after block read
1004 * operations.
1005 *
1006 * When the DMA transfer is complete, the controller
1007 * may still be reading the CRC from the card, i.e.
1008 * the data transfer is still in progress and we
1009 * haven't seen all the potential error bits yet.
1010 *
1011 * The interrupt handler will schedule a different
1011 * tasklet to finish things up when the data transfer
1012 * bh work to finish things up when the data transfer
1012 * is completely done.
1013 *
1014 * We may not complete the mmc request here anyway
1015 * because the mmc layer may call back and cause us to
1016 * violate the "don't submit new operations from the
1017 * completion callback" rule of the dma engine
1018 * framework.
1019 */

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1740 }
1741 }
1742 spin_unlock(&host->lock);
1743
1744 mmc_detect_change(slot->mmc, 0);
1745 }
1746}
1747
1013 * is completely done.
1014 *
1015 * We may not complete the mmc request here anyway
1016 * because the mmc layer may call back and cause us to
1017 * violate the "don't submit new operations from the
1018 * completion callback" rule of the dma engine
1019 * framework.
1020 */

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1741 }
1742 }
1743 spin_unlock(&host->lock);
1744
1745 mmc_detect_change(slot->mmc, 0);
1746 }
1747}
1748
1748static void atmci_tasklet_func(struct tasklet_struct *t)
1749static void atmci_work_func(struct work_struct *t)
1749{
1750{
1750 struct atmel_mci *host = from_tasklet(host, t, tasklet);
1751 struct atmel_mci *host = from_work(host, t, bh_work);
1751 struct mmc_request *mrq = host->mrq;
1752 struct mmc_data *data = host->data;
1753 struct device *dev = host->dev;
1754 enum atmel_mci_state state = host->state;
1755 enum atmel_mci_state prev_state;
1756 u32 status;
1757
1758 spin_lock(&host->lock);
1759
1760 state = host->state;
1761
1752 struct mmc_request *mrq = host->mrq;
1753 struct mmc_data *data = host->data;
1754 struct device *dev = host->dev;
1755 enum atmel_mci_state state = host->state;
1756 enum atmel_mci_state prev_state;
1757 u32 status;
1758
1759 spin_lock(&host->lock);
1760
1761 state = host->state;
1762
1762 dev_vdbg(dev, "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1763 dev_vdbg(dev, "bh_work: state %u pending/completed/mask %lx/%lx/%x\n",
1763 state, host->pending_events, host->completed_events,
1764 atmci_readl(host, ATMCI_IMR));
1765
1766 do {
1767 prev_state = state;
1768 dev_dbg(dev, "FSM: state=%d\n", state);
1769
1770 switch (state) {

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2113 | ATMCI_RXRDY | ATMCI_TXRDY
2114 | ATMCI_ENDRX | ATMCI_ENDTX
2115 | ATMCI_RXBUFF | ATMCI_TXBUFE);
2116
2117 host->data_status = status;
2118 dev_dbg(dev, "set pending data error\n");
2119 smp_wmb();
2120 atmci_set_pending(host, EVENT_DATA_ERROR);
1764 state, host->pending_events, host->completed_events,
1765 atmci_readl(host, ATMCI_IMR));
1766
1767 do {
1768 prev_state = state;
1769 dev_dbg(dev, "FSM: state=%d\n", state);
1770
1771 switch (state) {

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2114 | ATMCI_RXRDY | ATMCI_TXRDY
2115 | ATMCI_ENDRX | ATMCI_ENDTX
2116 | ATMCI_RXBUFF | ATMCI_TXBUFE);
2117
2118 host->data_status = status;
2119 dev_dbg(dev, "set pending data error\n");
2120 smp_wmb();
2121 atmci_set_pending(host, EVENT_DATA_ERROR);
2121 tasklet_schedule(&host->tasklet);
2122 queue_work(system_bh_wq, &host->bh_work);
2122 }
2123
2124 if (pending & ATMCI_TXBUFE) {
2125 dev_dbg(dev, "IRQ: tx buffer empty\n");
2126 atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE);
2127 atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
2128 /*
2129 * We can receive this interruption before having configured

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2182 * The appropriate workaround is to use the BLKE signal.
2183 */
2184 if (pending & ATMCI_BLKE) {
2185 dev_dbg(dev, "IRQ: blke\n");
2186 atmci_writel(host, ATMCI_IDR, ATMCI_BLKE);
2187 smp_wmb();
2188 dev_dbg(dev, "set pending notbusy\n");
2189 atmci_set_pending(host, EVENT_NOTBUSY);
2123 }
2124
2125 if (pending & ATMCI_TXBUFE) {
2126 dev_dbg(dev, "IRQ: tx buffer empty\n");
2127 atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE);
2128 atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
2129 /*
2130 * We can receive this interruption before having configured

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2183 * The appropriate workaround is to use the BLKE signal.
2184 */
2185 if (pending & ATMCI_BLKE) {
2186 dev_dbg(dev, "IRQ: blke\n");
2187 atmci_writel(host, ATMCI_IDR, ATMCI_BLKE);
2188 smp_wmb();
2189 dev_dbg(dev, "set pending notbusy\n");
2190 atmci_set_pending(host, EVENT_NOTBUSY);
2190 tasklet_schedule(&host->tasklet);
2191 queue_work(system_bh_wq, &host->bh_work);
2191 }
2192
2193 if (pending & ATMCI_NOTBUSY) {
2194 dev_dbg(dev, "IRQ: not_busy\n");
2195 atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY);
2196 smp_wmb();
2197 dev_dbg(dev, "set pending notbusy\n");
2198 atmci_set_pending(host, EVENT_NOTBUSY);
2192 }
2193
2194 if (pending & ATMCI_NOTBUSY) {
2195 dev_dbg(dev, "IRQ: not_busy\n");
2196 atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY);
2197 smp_wmb();
2198 dev_dbg(dev, "set pending notbusy\n");
2199 atmci_set_pending(host, EVENT_NOTBUSY);
2199 tasklet_schedule(&host->tasklet);
2200 queue_work(system_bh_wq, &host->bh_work);
2200 }
2201
2202 if (pending & ATMCI_RXRDY)
2203 atmci_read_data_pio(host);
2204 if (pending & ATMCI_TXRDY)
2205 atmci_write_data_pio(host);
2206
2207 if (pending & ATMCI_CMDRDY) {
2208 dev_dbg(dev, "IRQ: cmd ready\n");
2209 atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY);
2210 host->cmd_status = status;
2211 smp_wmb();
2212 dev_dbg(dev, "set pending cmd rdy\n");
2213 atmci_set_pending(host, EVENT_CMD_RDY);
2201 }
2202
2203 if (pending & ATMCI_RXRDY)
2204 atmci_read_data_pio(host);
2205 if (pending & ATMCI_TXRDY)
2206 atmci_write_data_pio(host);
2207
2208 if (pending & ATMCI_CMDRDY) {
2209 dev_dbg(dev, "IRQ: cmd ready\n");
2210 atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY);
2211 host->cmd_status = status;
2212 smp_wmb();
2213 dev_dbg(dev, "set pending cmd rdy\n");
2214 atmci_set_pending(host, EVENT_CMD_RDY);
2214 tasklet_schedule(&host->tasklet);
2215 queue_work(system_bh_wq, &host->bh_work);
2215 }
2216
2217 if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
2218 atmci_sdio_interrupt(host, status);
2219
2220 } while (pass_count++ < 5);
2221
2222 return pass_count ? IRQ_HANDLED : IRQ_NONE;

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2482 if (ret)
2483 return ret;
2484
2485 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
2486 host->bus_hz = clk_get_rate(host->mck);
2487
2488 host->mapbase = regs->start;
2489
2216 }
2217
2218 if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
2219 atmci_sdio_interrupt(host, status);
2220
2221 } while (pass_count++ < 5);
2222
2223 return pass_count ? IRQ_HANDLED : IRQ_NONE;

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2483 if (ret)
2484 return ret;
2485
2486 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
2487 host->bus_hz = clk_get_rate(host->mck);
2488
2489 host->mapbase = regs->start;
2490
2490 tasklet_setup(&host->tasklet, atmci_tasklet_func);
2491 INIT_WORK(&host->bh_work, atmci_work_func);
2491
2492 ret = request_irq(irq, atmci_interrupt, 0, dev_name(dev), host);
2493 if (ret) {
2494 clk_disable_unprepare(host->mck);
2495 return ret;
2496 }
2497
2498 /* Get MCI capabilities and set operations according to it */

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2493 ret = request_irq(irq, atmci_interrupt, 0, dev_name(dev), host);
2494 if (ret) {
2495 clk_disable_unprepare(host->mck);
2496 return ret;
2497 }
2498
2499 /* Get MCI capabilities and set operations according to it */

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