atmel-mci.c (4b3df5668c8ebaebd8d66a5a94374be3e3b2ef0c) atmel-mci.c (04d699c3643fbf75dd72c03a4eacec87149c4aca)
1/*
2 * Atmel MultiMedia Card Interface driver
3 *
4 * Copyright (C) 2004-2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

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25#include <linux/stat.h>
26
27#include <linux/mmc/host.h>
28#include <linux/atmel-mci.h>
29
30#include <asm/io.h>
31#include <asm/unaligned.h>
32
1/*
2 * Atmel MultiMedia Card Interface driver
3 *
4 * Copyright (C) 2004-2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

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25#include <linux/stat.h>
26
27#include <linux/mmc/host.h>
28#include <linux/atmel-mci.h>
29
30#include <asm/io.h>
31#include <asm/unaligned.h>
32
33#include <mach/cpu.h>
33#include <mach/board.h>
34
35#include "atmel-mci-regs.h"
36
37#define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
38#define ATMCI_DMA_THRESHOLD 16
39
40enum {

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205#define atmci_test_and_clear_pending(host, event) \
206 test_and_clear_bit(event, &host->pending_events)
207#define atmci_set_completed(host, event) \
208 set_bit(event, &host->completed_events)
209#define atmci_set_pending(host, event) \
210 set_bit(event, &host->pending_events)
211
212/*
34#include <mach/board.h>
35
36#include "atmel-mci-regs.h"
37
38#define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
39#define ATMCI_DMA_THRESHOLD 16
40
41enum {

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206#define atmci_test_and_clear_pending(host, event) \
207 test_and_clear_bit(event, &host->pending_events)
208#define atmci_set_completed(host, event) \
209 set_bit(event, &host->completed_events)
210#define atmci_set_pending(host, event) \
211 set_bit(event, &host->pending_events)
212
213/*
214 * Enable or disable features/registers based on
215 * whether the processor supports them
216 */
217static bool mci_has_rwproof(void)
218{
219 if (cpu_is_at91sam9261() || cpu_is_at91rm9200())
220 return false;
221 else
222 return true;
223}
224
225/*
213 * The debugfs stuff below is mostly optimized away when
214 * CONFIG_DEBUG_FS is not set.
215 */
216static int atmci_req_show(struct seq_file *s, void *v)
217{
218 struct atmel_mci_slot *slot = s->private;
219 struct mmc_request *mrq;
220 struct mmc_command *cmd;

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271{
272 static const char *sr_bit[] = {
273 [0] = "CMDRDY",
274 [1] = "RXRDY",
275 [2] = "TXRDY",
276 [3] = "BLKE",
277 [4] = "DTIP",
278 [5] = "NOTBUSY",
226 * The debugfs stuff below is mostly optimized away when
227 * CONFIG_DEBUG_FS is not set.
228 */
229static int atmci_req_show(struct seq_file *s, void *v)
230{
231 struct atmel_mci_slot *slot = s->private;
232 struct mmc_request *mrq;
233 struct mmc_command *cmd;

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284{
285 static const char *sr_bit[] = {
286 [0] = "CMDRDY",
287 [1] = "RXRDY",
288 [2] = "TXRDY",
289 [3] = "BLKE",
290 [4] = "DTIP",
291 [5] = "NOTBUSY",
292 [6] = "ENDRX",
293 [7] = "ENDTX",
279 [8] = "SDIOIRQA",
280 [9] = "SDIOIRQB",
294 [8] = "SDIOIRQA",
295 [9] = "SDIOIRQB",
296 [12] = "SDIOWAIT",
297 [14] = "RXBUFF",
298 [15] = "TXBUFE",
281 [16] = "RINDE",
282 [17] = "RDIRE",
283 [18] = "RCRCE",
284 [19] = "RENDE",
285 [20] = "RTOE",
286 [21] = "DCRCE",
287 [22] = "DTOE",
299 [16] = "RINDE",
300 [17] = "RDIRE",
301 [18] = "RCRCE",
302 [19] = "RENDE",
303 [20] = "RTOE",
304 [21] = "DCRCE",
305 [22] = "DTOE",
306 [23] = "CSTOE",
307 [24] = "BLKOVRE",
308 [25] = "DMADONE",
309 [26] = "FIFOEMPTY",
310 [27] = "XFRDONE",
288 [30] = "OVRE",
289 [31] = "UNRE",
290 };
291 unsigned int i;
292
293 seq_printf(s, "%s:\t0x%08x", regname, value);
294 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
295 if (value & (1 << i)) {

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571static int
572atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
573{
574 struct dma_chan *chan;
575 struct dma_async_tx_descriptor *desc;
576 struct scatterlist *sg;
577 unsigned int i;
578 enum dma_data_direction direction;
311 [30] = "OVRE",
312 [31] = "UNRE",
313 };
314 unsigned int i;
315
316 seq_printf(s, "%s:\t0x%08x", regname, value);
317 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
318 if (value & (1 << i)) {

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594static int
595atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
596{
597 struct dma_chan *chan;
598 struct dma_async_tx_descriptor *desc;
599 struct scatterlist *sg;
600 unsigned int i;
601 enum dma_data_direction direction;
579 unsigned int sglen;
580
581 /*
582 * We don't do DMA on "complex" transfers, i.e. with
583 * non-word-aligned buffers or lengths. Also, we don't bother
584 * with all the DMA setup overhead for short transfers.
585 */
586 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
587 return -EINVAL;

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601 if (!chan)
602 return -ENODEV;
603
604 if (data->flags & MMC_DATA_READ)
605 direction = DMA_FROM_DEVICE;
606 else
607 direction = DMA_TO_DEVICE;
608
602
603 /*
604 * We don't do DMA on "complex" transfers, i.e. with
605 * non-word-aligned buffers or lengths. Also, we don't bother
606 * with all the DMA setup overhead for short transfers.
607 */
608 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
609 return -EINVAL;

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623 if (!chan)
624 return -ENODEV;
625
626 if (data->flags & MMC_DATA_READ)
627 direction = DMA_FROM_DEVICE;
628 else
629 direction = DMA_TO_DEVICE;
630
609 sglen = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, direction);
610 if (sglen != data->sg_len)
611 goto unmap_exit;
612 desc = chan->device->device_prep_slave_sg(chan,
613 data->sg, data->sg_len, direction,
614 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
615 if (!desc)
631 desc = chan->device->device_prep_slave_sg(chan,
632 data->sg, data->sg_len, direction,
633 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
634 if (!desc)
616 goto unmap_exit;
635 return -ENOMEM;
617
618 host->dma.data_desc = desc;
619 desc->callback = atmci_dma_complete;
620 desc->callback_param = host;
621 desc->tx_submit(desc);
622
623 /* Go! */
624 chan->device->device_issue_pending(chan);
625
626 return 0;
636
637 host->dma.data_desc = desc;
638 desc->callback = atmci_dma_complete;
639 desc->callback_param = host;
640 desc->tx_submit(desc);
641
642 /* Go! */
643 chan->device->device_issue_pending(chan);
644
645 return 0;
627unmap_exit:
628 dma_unmap_sg(&host->pdev->dev, data->sg, sglen, direction);
629 return -ENOMEM;
630}
631
632#else /* CONFIG_MMC_ATMELMCI_DMA */
633
634static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
635{
636 return -ENOSYS;
637}

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851 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
852 if (clkdiv > 255) {
853 dev_warn(&mmc->class_dev,
854 "clock %u too slow; using %lu\n",
855 clock_min, host->bus_hz / (2 * 256));
856 clkdiv = 255;
857 }
858
646}
647
648#else /* CONFIG_MMC_ATMELMCI_DMA */
649
650static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
651{
652 return -ENOSYS;
653}

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867 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
868 if (clkdiv > 255) {
869 dev_warn(&mmc->class_dev,
870 "clock %u too slow; using %lu\n",
871 clock_min, host->bus_hz / (2 * 256));
872 clkdiv = 255;
873 }
874
875 host->mode_reg = MCI_MR_CLKDIV(clkdiv);
876
859 /*
860 * WRPROOF and RDPROOF prevent overruns/underruns by
861 * stopping the clock when the FIFO is full/empty.
862 * This state is not expected to last for long.
863 */
877 /*
878 * WRPROOF and RDPROOF prevent overruns/underruns by
879 * stopping the clock when the FIFO is full/empty.
880 * This state is not expected to last for long.
881 */
864 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF
865 | MCI_MR_RDPROOF;
882 if (mci_has_rwproof())
883 host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF);
866
867 if (list_empty(&host->queue))
868 mci_writel(host, MR, host->mode_reg);
869 else
870 host->need_clock_update = true;
871
872 spin_unlock_bh(&host->lock);
873 } else {

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1650 }
1651 if (pdata->slot[1].bus_width) {
1652 ret = atmci_init_slot(host, &pdata->slot[1],
1653 MCI_SDCSEL_SLOT_B, 1);
1654 if (!ret)
1655 nr_slots++;
1656 }
1657
884
885 if (list_empty(&host->queue))
886 mci_writel(host, MR, host->mode_reg);
887 else
888 host->need_clock_update = true;
889
890 spin_unlock_bh(&host->lock);
891 } else {

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1668 }
1669 if (pdata->slot[1].bus_width) {
1670 ret = atmci_init_slot(host, &pdata->slot[1],
1671 MCI_SDCSEL_SLOT_B, 1);
1672 if (!ret)
1673 nr_slots++;
1674 }
1675
1658 if (!nr_slots)
1676 if (!nr_slots) {
1677 dev_err(&pdev->dev, "init failed: no slot defined\n");
1659 goto err_init_slot;
1678 goto err_init_slot;
1679 }
1660
1661 dev_info(&pdev->dev,
1662 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1663 host->mapbase, irq, nr_slots);
1664
1665 return 0;
1666
1667err_init_slot:

--- 69 unchanged lines hidden --- 		1680
1681 dev_info(&pdev->dev,
1682 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1683 host->mapbase, irq, nr_slots);
1684
1685 return 0;
1686
1687err_init_slot:

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