rts5228.c (849a9366cba92cb5dc9dc1161ef49416a290aae9) rts5228.c (22bf3251d7b7da0339f41ec27f2c3d4e0ec02255)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/* Driver for Realtek PCI-Express card reader
3 *
4 * Copyright(c) 2018-2019 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * Author:
7 * Ricky WU <ricky_wu@realtek.com>
8 * Rui FENG <rui_feng@realsil.com.cn>

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55 0xFF, driving[drive_sel][1]);
56
57 rtsx_pci_write_register(pcr, SD30_DAT_DRIVE_SEL,
58 0xFF, driving[drive_sel][2]);
59}
60
61static void rtsx5228_fetch_vendor_settings(struct rtsx_pcr *pcr)
62{
1// SPDX-License-Identifier: GPL-2.0-or-later
2/* Driver for Realtek PCI-Express card reader
3 *
4 * Copyright(c) 2018-2019 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * Author:
7 * Ricky WU <ricky_wu@realtek.com>
8 * Rui FENG <rui_feng@realsil.com.cn>

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55 0xFF, driving[drive_sel][1]);
56
57 rtsx_pci_write_register(pcr, SD30_DAT_DRIVE_SEL,
58 0xFF, driving[drive_sel][2]);
59}
60
61static void rtsx5228_fetch_vendor_settings(struct rtsx_pcr *pcr)
62{
63 struct pci_dev *pdev = pcr->pci;
63 u32 reg;
64 u32 reg;
65
64 /* 0x724~0x727 */
66 /* 0x724~0x727 */
65 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
67 pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
66 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
67
68 if (!rtsx_vendor_setting_valid(reg)) {
69 pcr_dbg(pcr, "skip fetch vendor setting\n");
70 return;
71 }
72 pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg);
73 pcr->aspm_en = rtsx_reg_to_aspm(reg);
74
75 /* 0x814~0x817 */
68 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
69
70 if (!rtsx_vendor_setting_valid(reg)) {
71 pcr_dbg(pcr, "skip fetch vendor setting\n");
72 return;
73 }
74 pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg);
75 pcr->aspm_en = rtsx_reg_to_aspm(reg);
76
77 /* 0x814~0x817 */
76 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
78 pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
77 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
78
79 pcr->rtd3_en = rtsx_reg_to_rtd3(reg);
80 if (rtsx_check_mmc_support(reg))
81 pcr->extra_caps |= EXTRA_CAPS_NO_MMC;
82 pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
83 if (rtsx_reg_check_reverse_socket(reg))
84 pcr->flags |= PCR_REVERSE_SOCKET;

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375
376}
377
378static void rts5228_init_from_cfg(struct rtsx_pcr *pcr)
379{
380 u32 lval;
381 struct rtsx_cr_option *option = &pcr->option;
382
79 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
80
81 pcr->rtd3_en = rtsx_reg_to_rtd3(reg);
82 if (rtsx_check_mmc_support(reg))
83 pcr->extra_caps |= EXTRA_CAPS_NO_MMC;
84 pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
85 if (rtsx_reg_check_reverse_socket(reg))
86 pcr->flags |= PCR_REVERSE_SOCKET;

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377
378}
379
380static void rts5228_init_from_cfg(struct rtsx_pcr *pcr)
381{
382 u32 lval;
383 struct rtsx_cr_option *option = &pcr->option;
384
383 rtsx_pci_read_config_dword(pcr, PCR_ASPM_SETTING_REG1, &lval);
385 pci_read_config_dword(pcr->pci, PCR_ASPM_SETTING_REG1, &lval);
384
385
386 if (0 == (lval & 0x0F))
387 rtsx_pci_enable_oobs_polling(pcr);
388 else
389 rtsx_pci_disable_oobs_polling(pcr);
390
391 if (lval & ASPM_L1_1_EN_MASK)

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387
388 if (0 == (lval & 0x0F))
389 rtsx_pci_enable_oobs_polling(pcr);
390 else
391 rtsx_pci_disable_oobs_polling(pcr);
392
393 if (lval & ASPM_L1_1_EN_MASK)

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