db8500-prcmu.c (4c07e2ddab5b6b57dbcb09aedbda1f484d5940cc) db8500-prcmu.c (cb063a83ca321fbf0cb2b4044186f241d89f3dc1)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * DB8500 PRCM Unit driver
4 *
5 * Copyright (C) STMicroelectronics 2009
6 * Copyright (C) ST-Ericsson SA 2010
7 *
8 * Author: Kumar Sanghvi <kumar.sanghvi@stericsson.com>

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31#include <linux/platform_device.h>
32#include <linux/uaccess.h>
33#include <linux/mfd/core.h>
34#include <linux/mfd/dbx500-prcmu.h>
35#include <linux/mfd/abx500/ab8500.h>
36#include <linux/regulator/db8500-prcmu.h>
37#include <linux/regulator/machine.h>
38#include <linux/platform_data/ux500_wdt.h>
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * DB8500 PRCM Unit driver
4 *
5 * Copyright (C) STMicroelectronics 2009
6 * Copyright (C) ST-Ericsson SA 2010
7 *
8 * Author: Kumar Sanghvi <kumar.sanghvi@stericsson.com>

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31#include <linux/platform_device.h>
32#include <linux/uaccess.h>
33#include <linux/mfd/core.h>
34#include <linux/mfd/dbx500-prcmu.h>
35#include <linux/mfd/abx500/ab8500.h>
36#include <linux/regulator/db8500-prcmu.h>
37#include <linux/regulator/machine.h>
38#include <linux/platform_data/ux500_wdt.h>
39#include <linux/platform_data/db8500_thermal.h>
40#include "dbx500-prcmu-regs.h"
41
42/* Index of different voltages to be used when accessing AVSData */
43#define PRCM_AVS_BASE 0x2FC
44#define PRCM_AVS_VBB_RET (PRCM_AVS_BASE + 0x0)
45#define PRCM_AVS_VBB_MAX_OPP (PRCM_AVS_BASE + 0x1)
46#define PRCM_AVS_VBB_100_OPP (PRCM_AVS_BASE + 0x2)
47#define PRCM_AVS_VBB_50_OPP (PRCM_AVS_BASE + 0x3)

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1690 if (r <= rate)
1691 return (unsigned long)r;
1692 }
1693 rounded_rate = (src_rate / min(div, (u32)31));
1694
1695 return rounded_rate;
1696}
1697
39#include "dbx500-prcmu-regs.h"
40
41/* Index of different voltages to be used when accessing AVSData */
42#define PRCM_AVS_BASE 0x2FC
43#define PRCM_AVS_VBB_RET (PRCM_AVS_BASE + 0x0)
44#define PRCM_AVS_VBB_MAX_OPP (PRCM_AVS_BASE + 0x1)
45#define PRCM_AVS_VBB_100_OPP (PRCM_AVS_BASE + 0x2)
46#define PRCM_AVS_VBB_50_OPP (PRCM_AVS_BASE + 0x3)

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1689 if (r <= rate)
1690 return (unsigned long)r;
1691 }
1692 rounded_rate = (src_rate / min(div, (u32)31));
1693
1694 return rounded_rate;
1695}
1696
1698static const unsigned long db8500_armss_freqs[] = {
1697static const unsigned long armss_freqs[] = {
1699 200000000,
1700 400000000,
1701 800000000,
1702 998400000
1703};
1704
1698 200000000,
1699 400000000,
1700 800000000,
1701 998400000
1702};
1703
1705/* The DB8520 has slightly higher ARMSS max frequency */
1706static const unsigned long db8520_armss_freqs[] = {
1707 200000000,
1708 400000000,
1709 800000000,
1710 1152000000
1711};
1712
1713
1714
1715static long round_armss_rate(unsigned long rate)
1716{
1717 unsigned long freq = 0;
1704static long round_armss_rate(unsigned long rate)
1705{
1706 unsigned long freq = 0;
1718 const unsigned long *freqs;
1719 int nfreqs;
1720 int i;
1721
1707 int i;
1708
1722 if (fw_info.version.project == PRCMU_FW_PROJECT_U8520) {
1723 freqs = db8520_armss_freqs;
1724 nfreqs = ARRAY_SIZE(db8520_armss_freqs);
1725 } else {
1726 freqs = db8500_armss_freqs;
1727 nfreqs = ARRAY_SIZE(db8500_armss_freqs);
1728 }
1729
1730 /* Find the corresponding arm opp from the cpufreq table. */
1709 /* Find the corresponding arm opp from the cpufreq table. */
1731 for (i = 0; i < nfreqs; i++) {
1732 freq = freqs[i];
1710 for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) {
1711 freq = armss_freqs[i];
1733 if (rate <= freq)
1734 break;
1735 }
1736
1737 /* Return the last valid value, even if a match was not found. */
1738 return freq;
1739}
1740

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1869
1870 spin_unlock_irqrestore(&clk_mgt_lock, flags);
1871}
1872
1873static int set_armss_rate(unsigned long rate)
1874{
1875 unsigned long freq;
1876 u8 opps[] = { ARM_EXTCLK, ARM_50_OPP, ARM_100_OPP, ARM_MAX_OPP };
1712 if (rate <= freq)
1713 break;
1714 }
1715
1716 /* Return the last valid value, even if a match was not found. */
1717 return freq;
1718}
1719

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1848
1849 spin_unlock_irqrestore(&clk_mgt_lock, flags);
1850}
1851
1852static int set_armss_rate(unsigned long rate)
1853{
1854 unsigned long freq;
1855 u8 opps[] = { ARM_EXTCLK, ARM_50_OPP, ARM_100_OPP, ARM_MAX_OPP };
1877 const unsigned long *freqs;
1878 int nfreqs;
1879 int i;
1880
1856 int i;
1857
1881 if (fw_info.version.project == PRCMU_FW_PROJECT_U8520) {
1882 freqs = db8520_armss_freqs;
1883 nfreqs = ARRAY_SIZE(db8520_armss_freqs);
1884 } else {
1885 freqs = db8500_armss_freqs;
1886 nfreqs = ARRAY_SIZE(db8500_armss_freqs);
1887 }
1888
1889 /* Find the corresponding arm opp from the cpufreq table. */
1858 /* Find the corresponding arm opp from the cpufreq table. */
1890 for (i = 0; i < nfreqs; i++) {
1891 freq = freqs[i];
1859 for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) {
1860 freq = armss_freqs[i];
1892 if (rate == freq)
1893 break;
1894 }
1895
1896 if (rate != freq)
1897 return -EINVAL;
1898
1899 /* Set the new arm opp. */

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3009 },
3010 },
3011};
3012
3013static struct ux500_wdt_data db8500_wdt_pdata = {
3014 .timeout = 600, /* 10 minutes */
3015 .has_28_bits_resolution = true,
3016};
1861 if (rate == freq)
1862 break;
1863 }
1864
1865 if (rate != freq)
1866 return -EINVAL;
1867
1868 /* Set the new arm opp. */

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2978 },
2979 },
2980};
2981
2982static struct ux500_wdt_data db8500_wdt_pdata = {
2983 .timeout = 600, /* 10 minutes */
2984 .has_28_bits_resolution = true,
2985};
3017/*
3018 * Thermal Sensor
3019 */
3020
2986
3021static struct resource db8500_thsens_resources[] = {
3022 {
3023 .name = "IRQ_HOTMON_LOW",
3024 .start = IRQ_PRCMU_HOTMON_LOW,
3025 .end = IRQ_PRCMU_HOTMON_LOW,
3026 .flags = IORESOURCE_IRQ,
3027 },
3028 {
3029 .name = "IRQ_HOTMON_HIGH",
3030 .start = IRQ_PRCMU_HOTMON_HIGH,
3031 .end = IRQ_PRCMU_HOTMON_HIGH,
3032 .flags = IORESOURCE_IRQ,
3033 },
3034};
3035
3036static struct db8500_thsens_platform_data db8500_thsens_data = {
3037 .trip_points[0] = {
3038 .temp = 70000,
3039 .type = THERMAL_TRIP_ACTIVE,
3040 .cdev_name = {
3041 [0] = "thermal-cpufreq-0",
3042 },
3043 },
3044 .trip_points[1] = {
3045 .temp = 75000,
3046 .type = THERMAL_TRIP_ACTIVE,
3047 .cdev_name = {
3048 [0] = "thermal-cpufreq-0",
3049 },
3050 },
3051 .trip_points[2] = {
3052 .temp = 80000,
3053 .type = THERMAL_TRIP_ACTIVE,
3054 .cdev_name = {
3055 [0] = "thermal-cpufreq-0",
3056 },
3057 },
3058 .trip_points[3] = {
3059 .temp = 85000,
3060 .type = THERMAL_TRIP_CRITICAL,
3061 },
3062 .num_trips = 4,
3063};
3064
3065static const struct mfd_cell common_prcmu_devs[] = {
3066 {
3067 .name = "ux500_wdt",
3068 .platform_data = &db8500_wdt_pdata,
3069 .pdata_size = sizeof(db8500_wdt_pdata),
3070 .id = -1,
3071 },
3072};

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3079 .pdata_size = sizeof(db8500_regulators),
3080 },
3081 {
3082 .name = "cpuidle-dbx500",
3083 .of_compatible = "stericsson,cpuidle-dbx500",
3084 },
3085 {
3086 .name = "db8500-thermal",
2987static const struct mfd_cell common_prcmu_devs[] = {
2988 {
2989 .name = "ux500_wdt",
2990 .platform_data = &db8500_wdt_pdata,
2991 .pdata_size = sizeof(db8500_wdt_pdata),
2992 .id = -1,
2993 },
2994};

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3001 .pdata_size = sizeof(db8500_regulators),
3002 },
3003 {
3004 .name = "cpuidle-dbx500",
3005 .of_compatible = "stericsson,cpuidle-dbx500",
3006 },
3007 {
3008 .name = "db8500-thermal",
3087 .num_resources = ARRAY_SIZE(db8500_thsens_resources),
3088 .resources = db8500_thsens_resources,
3089 .platform_data = &db8500_thsens_data,
3090 .pdata_size = sizeof(db8500_thsens_data),
3009 .of_compatible = "stericsson,db8500-thermal",
3091 },
3092};
3093
3094static int db8500_prcmu_register_ab8500(struct device *parent)
3095{
3096 struct device_node *np;
3097 struct resource ab8500_resource;
3098 const struct mfd_cell ab8500_cell = {

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3155 "failed to ioremap prcmu-tcdm register memory\n");
3156 return -ENOMEM;
3157 }
3158
3159 /* Clean up the mailbox interrupts after pre-kernel code. */
3160 writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);
3161
3162 irq = platform_get_irq(pdev, 0);
3010 },
3011};
3012
3013static int db8500_prcmu_register_ab8500(struct device *parent)
3014{
3015 struct device_node *np;
3016 struct resource ab8500_resource;
3017 const struct mfd_cell ab8500_cell = {

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3074 "failed to ioremap prcmu-tcdm register memory\n");
3075 return -ENOMEM;
3076 }
3077
3078 /* Clean up the mailbox interrupts after pre-kernel code. */
3079 writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);
3080
3081 irq = platform_get_irq(pdev, 0);
3163 if (irq <= 0)
3082 if (irq <= 0) {
3083 dev_err(&pdev->dev, "no prcmu irq provided\n");
3164 return irq;
3084 return irq;
3085 }
3165
3166 err = request_threaded_irq(irq, prcmu_irq_handler,
3167 prcmu_irq_thread_fn, IRQF_NO_SUSPEND, "prcmu", NULL);
3168 if (err < 0) {
3169 pr_err("prcmu: Failed to allocate IRQ_DB8500_PRCMU1.\n");
3170 return err;
3171 }
3172

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3087 err = request_threaded_irq(irq, prcmu_irq_handler,
3088 prcmu_irq_thread_fn, IRQF_NO_SUSPEND, "prcmu", NULL);
3089 if (err < 0) {
3090 pr_err("prcmu: Failed to allocate IRQ_DB8500_PRCMU1.\n");
3091 return err;
3092 }
3093

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