au0828-cards.c (cfd0c77d0830d33288e9da17aa10db3a61de601a) au0828-cards.c (2fcfd317f66c6e6cf0e05351e7641898d767dfa4)
1/*
2 * Driver for the Auvitek USB bridge
3 *
4 * Copyright (c) 2008 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or

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66 .audio_setup = hvr950q_cs5340_audio,
67 },
68 },
69 },
70 [AU0828_BOARD_HAUPPAUGE_HVR950Q] = {
71 .name = "Hauppauge HVR950Q",
72 .tuner_type = TUNER_XC5000,
73 .tuner_addr = 0x61,
1/*
2 * Driver for the Auvitek USB bridge
3 *
4 * Copyright (c) 2008 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or

--- 57 unchanged lines hidden (view full) ---

66 .audio_setup = hvr950q_cs5340_audio,
67 },
68 },
69 },
70 [AU0828_BOARD_HAUPPAUGE_HVR950Q] = {
71 .name = "Hauppauge HVR950Q",
72 .tuner_type = TUNER_XC5000,
73 .tuner_addr = 0x61,
74 .has_ir_i2c = 1,
74 /* The au0828 hardware i2c implementation does not properly
75 support the xc5000's i2c clock stretching. So we need to
76 lower the clock frequency enough where the 15us clock
77 stretch fits inside of a normal clock cycle, or else the
78 au0828 fails to set the STOP bit. A 30 KHz clock puts the
79 clock pulse width at 18us */
80 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
81 .input = {

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75 /* The au0828 hardware i2c implementation does not properly
76 support the xc5000's i2c clock stretching. So we need to
77 lower the clock frequency enough where the 15us clock
78 stretch fits inside of a normal clock cycle, or else the
79 au0828 fails to set the STOP bit. A 30 KHz clock puts the
80 clock pulse width at 18us */
81 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
82 .input = {

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