| tw5864-reg.h (353b7a55dcaf5fb8758e09ebe2ddf5f3adbac7c5) | tw5864-reg.h (e481ff3f19cd9d46da1a46ca7966403dc69e8632) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * TW5864 driver - registers description 4 * 5 * Copyright (C) 2016 Bluecherry, LLC <maintainers@bluecherrydvr.com> 6 */ 7 8/* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */ --- 649 unchanged lines hidden (view full) --- 658/* [1:0] CS valid to data valid CLK cycles when writing operation */ 659#define TW5864_CS2DAT_CNT 0x8000 660/* [2:0] Data valid signal width by system clock cycles */ 661#define TW5864_DATA_VLD_WIDTH 0x8004 662 663#define TW5864_SYNC 0x8008 664/* Define controls in register TW5864_SYNC */ 665/* | 1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * TW5864 driver - registers description 4 * 5 * Copyright (C) 2016 Bluecherry, LLC <maintainers@bluecherrydvr.com> 6 */ 7 8/* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */ --- 649 unchanged lines hidden (view full) --- 658/* [1:0] CS valid to data valid CLK cycles when writing operation */ 659#define TW5864_CS2DAT_CNT 0x8000 660/* [2:0] Data valid signal width by system clock cycles */ 661#define TW5864_DATA_VLD_WIDTH 0x8004 662 663#define TW5864_SYNC 0x8008 664/* Define controls in register TW5864_SYNC */ 665/* |
| 666 * 0 vlc stream to syncrous port | 666 * 0 vlc stream to synchronous port |
| 667 * 1 vlc stream to ddr buffers 668 */ 669#define TW5864_SYNC_CFG BIT(7) 670/* 671 * 0 SYNC Address sampled on Rising edge 672 * 1 SYNC Address sampled on Falling edge 673 */ 674#define TW5864_SYNC_ADR_EDGE BIT(0) --- 1458 unchanged lines hidden --- | 667 * 1 vlc stream to ddr buffers 668 */ 669#define TW5864_SYNC_CFG BIT(7) 670/* 671 * 0 SYNC Address sampled on Rising edge 672 * 1 SYNC Address sampled on Falling edge 673 */ 674#define TW5864_SYNC_ADR_EDGE BIT(0) --- 1458 unchanged lines hidden --- |