ddbridge-regs.h (22e743898dcd693cf587593781699db2fa888e23) ddbridge-regs.h (bb4cec96e5d7f0ff7f397f4518399be77a2f12db)
1/*
2 * ddbridge-regs.h: Digital Devices PCIe bridge driver
3 *
4 * Copyright (C) 2010-2017 Digital Devices GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 only, as published by the Free Software Foundation.

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128
129#define CI_READ_CMD (0x40000000)
130#define CI_WRITE_CMD (0x80000000)
131
132#define CI_BUFFER_BASE (0x3000)
133#define CI_BUFFER_SIZE (0x0800)
134
135#define CI_BUFFER(i) (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE)
1/*
2 * ddbridge-regs.h: Digital Devices PCIe bridge driver
3 *
4 * Copyright (C) 2010-2017 Digital Devices GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 only, as published by the Free Software Foundation.

--- 119 unchanged lines hidden (view full) ---

128
129#define CI_READ_CMD (0x40000000)
130#define CI_WRITE_CMD (0x80000000)
131
132#define CI_BUFFER_BASE (0x3000)
133#define CI_BUFFER_SIZE (0x0800)
134
135#define CI_BUFFER(i) (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE)
136
137/* ------------------------------------------------------------------------- */
138/* LNB commands (mxl5xx / Max S8) */
139
140#define LNB_BASE (0x400)
141#define LNB_CONTROL(i) (LNB_BASE + (i) * 0x20 + 0x00)
142
143#define LNB_CMD (7ULL << 0)
144#define LNB_CMD_NOP 0
145#define LNB_CMD_INIT 1
146#define LNB_CMD_LOW 3
147#define LNB_CMD_HIGH 4
148#define LNB_CMD_OFF 5
149#define LNB_CMD_DISEQC 6
150
151#define LNB_BUSY (1ULL << 4)
152#define LNB_TONE (1ULL << 15)
153
154#define LNB_BUF_LEVEL(i) (LNB_BASE + (i) * 0x20 + 0x10)
155#define LNB_BUF_WRITE(i) (LNB_BASE + (i) * 0x20 + 0x14)
156