irq-mbigen.c (245f0db0de926601353776085e6f6a4c974c5615) irq-mbigen.c (ed2a1002d25ccdb6606c8ccb608524118bd30614)
1/*
2 * Copyright (C) 2015 Hisilicon Limited, All Rights Reserved.
3 * Author: Jun Ma <majun258@huawei.com>
4 * Author: Yun Wu <wuyun.wu@huawei.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

--- 225 unchanged lines hidden (view full) ---

234 .translate = mbigen_domain_translate,
235 .alloc = mbigen_irq_domain_alloc,
236 .free = irq_domain_free_irqs_common,
237};
238
239static int mbigen_device_probe(struct platform_device *pdev)
240{
241 struct mbigen_device *mgn_chip;
1/*
2 * Copyright (C) 2015 Hisilicon Limited, All Rights Reserved.
3 * Author: Jun Ma <majun258@huawei.com>
4 * Author: Yun Wu <wuyun.wu@huawei.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

--- 225 unchanged lines hidden (view full) ---

234 .translate = mbigen_domain_translate,
235 .alloc = mbigen_irq_domain_alloc,
236 .free = irq_domain_free_irqs_common,
237};
238
239static int mbigen_device_probe(struct platform_device *pdev)
240{
241 struct mbigen_device *mgn_chip;
242 struct resource *res;
242 struct platform_device *child;
243 struct irq_domain *domain;
243 struct irq_domain *domain;
244 struct device_node *np;
245 struct device *parent;
246 struct resource *res;
244 u32 num_pins;
245
246 mgn_chip = devm_kzalloc(&pdev->dev, sizeof(*mgn_chip), GFP_KERNEL);
247 if (!mgn_chip)
248 return -ENOMEM;
249
250 mgn_chip->pdev = pdev;
251
252 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
253 mgn_chip->base = devm_ioremap_resource(&pdev->dev, res);
254 if (IS_ERR(mgn_chip->base))
255 return PTR_ERR(mgn_chip->base);
256
247 u32 num_pins;
248
249 mgn_chip = devm_kzalloc(&pdev->dev, sizeof(*mgn_chip), GFP_KERNEL);
250 if (!mgn_chip)
251 return -ENOMEM;
252
253 mgn_chip->pdev = pdev;
254
255 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
256 mgn_chip->base = devm_ioremap_resource(&pdev->dev, res);
257 if (IS_ERR(mgn_chip->base))
258 return PTR_ERR(mgn_chip->base);
259
257 if (of_property_read_u32(pdev->dev.of_node, "num-pins", &num_pins) < 0) {
258 dev_err(&pdev->dev, "No num-pins property\n");
259 return -EINVAL;
260 }
260 for_each_child_of_node(pdev->dev.of_node, np) {
261 if (!of_property_read_bool(np, "interrupt-controller"))
262 continue;
261
263
262 domain = platform_msi_create_device_domain(&pdev->dev, num_pins,
263 mbigen_write_msg,
264 &mbigen_domain_ops,
265 mgn_chip);
264 parent = platform_bus_type.dev_root;
265 child = of_platform_device_create(np, NULL, parent);
266 if (IS_ERR(child))
267 return PTR_ERR(child);
266
268
267 if (!domain)
268 return -ENOMEM;
269 if (of_property_read_u32(child->dev.of_node, "num-pins",
270 &num_pins) < 0) {
271 dev_err(&pdev->dev, "No num-pins property\n");
272 return -EINVAL;
273 }
269
274
270 platform_set_drvdata(pdev, mgn_chip);
275 domain = platform_msi_create_device_domain(&child->dev, num_pins,
276 mbigen_write_msg,
277 &mbigen_domain_ops,
278 mgn_chip);
279 if (!domain)
280 return -ENOMEM;
281 }
271
282
272 dev_info(&pdev->dev, "Allocated %d MSIs\n", num_pins);
273
283 platform_set_drvdata(pdev, mgn_chip);
274 return 0;
275}
276
277static const struct of_device_id mbigen_of_match[] = {
278 { .compatible = "hisilicon,mbigen-v2" },
279 { /* END */ }
280};
281MODULE_DEVICE_TABLE(of, mbigen_of_match);

--- 16 unchanged lines hidden --- 		284 return 0;
285}
286
287static const struct of_device_id mbigen_of_match[] = {
288 { .compatible = "hisilicon,mbigen-v2" },
289 { /* END */ }
290};
291MODULE_DEVICE_TABLE(of, mbigen_of_match);

--- 16 unchanged lines hidden ---