| iommu.c (26e495f341075c09023ba16dee9a7f37a021e745) | iommu.c (e52d58d54a321d4fe9d0ecdabe4f8774449f0d6e) |
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| 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. 4 * Author: Joerg Roedel <jroedel@suse.de> 5 * Leo Duran <leo.duran@amd.com> 6 */ 7 8#define pr_fmt(fmt) "AMD-Vi: " fmt --- 3278 unchanged lines hidden (view full) --- 3287 raw_spin_unlock_irqrestore(&table->lock, flags); 3288 3289 return index; 3290} 3291 3292static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte, 3293 struct amd_ir_data *data) 3294{ | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. 4 * Author: Joerg Roedel <jroedel@suse.de> 5 * Leo Duran <leo.duran@amd.com> 6 */ 7 8#define pr_fmt(fmt) "AMD-Vi: " fmt --- 3278 unchanged lines hidden (view full) --- 3287 raw_spin_unlock_irqrestore(&table->lock, flags); 3288 3289 return index; 3290} 3291 3292static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte, 3293 struct amd_ir_data *data) 3294{ |
| 3295 bool ret; |
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| 3295 struct irq_remap_table *table; 3296 struct amd_iommu *iommu; 3297 unsigned long flags; 3298 struct irte_ga *entry; 3299 3300 iommu = amd_iommu_rlookup_table[devid]; 3301 if (iommu == NULL) 3302 return -EINVAL; 3303 3304 table = get_irq_table(devid); 3305 if (!table) 3306 return -ENOMEM; 3307 3308 raw_spin_lock_irqsave(&table->lock, flags); 3309 3310 entry = (struct irte_ga *)table->table; 3311 entry = &entry[index]; | 3296 struct irq_remap_table *table; 3297 struct amd_iommu *iommu; 3298 unsigned long flags; 3299 struct irte_ga *entry; 3300 3301 iommu = amd_iommu_rlookup_table[devid]; 3302 if (iommu == NULL) 3303 return -EINVAL; 3304 3305 table = get_irq_table(devid); 3306 if (!table) 3307 return -ENOMEM; 3308 3309 raw_spin_lock_irqsave(&table->lock, flags); 3310 3311 entry = (struct irte_ga *)table->table; 3312 entry = &entry[index]; |
| 3312 entry->lo.fields_remap.valid = 0; 3313 entry->hi.val = irte->hi.val; 3314 entry->lo.val = irte->lo.val; 3315 entry->lo.fields_remap.valid = 1; | 3313 3314 ret = cmpxchg_double(&entry->lo.val, &entry->hi.val, 3315 entry->lo.val, entry->hi.val, 3316 irte->lo.val, irte->hi.val); 3317 /* 3318 * We use cmpxchg16 to atomically update the 128-bit IRTE, 3319 * and it cannot be updated by the hardware or other processors 3320 * behind us, so the return value of cmpxchg16 should be the 3321 * same as the old value. 3322 */ 3323 WARN_ON(!ret); 3324 |
| 3316 if (data) 3317 data->ref = entry; 3318 3319 raw_spin_unlock_irqrestore(&table->lock, flags); 3320 3321 iommu_flush_irt(iommu, devid); 3322 iommu_completion_wait(iommu); 3323 --- 730 unchanged lines hidden --- | 3325 if (data) 3326 data->ref = entry; 3327 3328 raw_spin_unlock_irqrestore(&table->lock, flags); 3329 3330 iommu_flush_irt(iommu, devid); 3331 iommu_completion_wait(iommu); 3332 --- 730 unchanged lines hidden --- |