| sm8250.h (cbecf716ca618fd44feda6bd9a64a8179d031fc5) | sm8250.h (10d13cb5959a93638aef39df6d91d5c4e1ffd199) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Qualcomm #define SM8250 interconnect IDs 4 * 5 * Copyright (c) 2020, The Linux Foundation. All rights reserved. 6 */ 7 8#ifndef __DRIVERS_INTERCONNECT_QCOM_SM8250_H --- 17 unchanged lines hidden (view full) --- 26#define SM8250_MASTER_CRYPTO_CORE_0 15 27#define SM8250_MASTER_GEM_NOC_CFG 16 28#define SM8250_MASTER_GEM_NOC_PCIE_SNOC 17 29#define SM8250_MASTER_GEM_NOC_SNOC 18 30#define SM8250_MASTER_GIC 19 31#define SM8250_MASTER_GPU_TCU 20 32#define SM8250_MASTER_GRAPHICS_3D 21 33#define SM8250_MASTER_IPA 22 | 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Qualcomm #define SM8250 interconnect IDs 4 * 5 * Copyright (c) 2020, The Linux Foundation. All rights reserved. 6 */ 7 8#ifndef __DRIVERS_INTERCONNECT_QCOM_SM8250_H --- 17 unchanged lines hidden (view full) --- 26#define SM8250_MASTER_CRYPTO_CORE_0 15 27#define SM8250_MASTER_GEM_NOC_CFG 16 28#define SM8250_MASTER_GEM_NOC_PCIE_SNOC 17 29#define SM8250_MASTER_GEM_NOC_SNOC 18 30#define SM8250_MASTER_GIC 19 31#define SM8250_MASTER_GPU_TCU 20 32#define SM8250_MASTER_GRAPHICS_3D 21 33#define SM8250_MASTER_IPA 22 |
| 34#define SM8250_MASTER_IPA_CORE 23 | 34/* 23 was used by MASTER_IPA_CORE, now represented as RPMh clock */ |
| 35#define SM8250_MASTER_LLCC 24 36#define SM8250_MASTER_MDP_PORT0 25 37#define SM8250_MASTER_MDP_PORT1 26 38#define SM8250_MASTER_MNOC_HF_MEM_NOC 27 39#define SM8250_MASTER_MNOC_SF_MEM_NOC 28 40#define SM8250_MASTER_NPU 29 41#define SM8250_MASTER_NPU_CDP 30 42#define SM8250_MASTER_NPU_NOC_CFG 31 --- 44 unchanged lines hidden (view full) --- 87#define SM8250_SLAVE_DCC_CFG 76 88#define SM8250_SLAVE_DISPLAY_CFG 77 89#define SM8250_SLAVE_EBI_CH0 78 90#define SM8250_SLAVE_GEM_NOC_CFG 79 91#define SM8250_SLAVE_GEM_NOC_SNOC 80 92#define SM8250_SLAVE_GRAPHICS_3D_CFG 81 93#define SM8250_SLAVE_IMEM_CFG 82 94#define SM8250_SLAVE_IPA_CFG 83 | 35#define SM8250_MASTER_LLCC 24 36#define SM8250_MASTER_MDP_PORT0 25 37#define SM8250_MASTER_MDP_PORT1 26 38#define SM8250_MASTER_MNOC_HF_MEM_NOC 27 39#define SM8250_MASTER_MNOC_SF_MEM_NOC 28 40#define SM8250_MASTER_NPU 29 41#define SM8250_MASTER_NPU_CDP 30 42#define SM8250_MASTER_NPU_NOC_CFG 31 --- 44 unchanged lines hidden (view full) --- 87#define SM8250_SLAVE_DCC_CFG 76 88#define SM8250_SLAVE_DISPLAY_CFG 77 89#define SM8250_SLAVE_EBI_CH0 78 90#define SM8250_SLAVE_GEM_NOC_CFG 79 91#define SM8250_SLAVE_GEM_NOC_SNOC 80 92#define SM8250_SLAVE_GRAPHICS_3D_CFG 81 93#define SM8250_SLAVE_IMEM_CFG 82 94#define SM8250_SLAVE_IPA_CFG 83 |
| 95#define SM8250_SLAVE_IPA_CORE 84 | 95/* 84 was used by SLAVE_IPA_CORE, now represented as RPMh clock */ |
| 96#define SM8250_SLAVE_IPC_ROUTER_CFG 85 97#define SM8250_SLAVE_ISENSE_CFG 86 98#define SM8250_SLAVE_LLCC 87 99#define SM8250_SLAVE_LLCC_CFG 88 100#define SM8250_SLAVE_LPASS 89 101#define SM8250_SLAVE_MEM_NOC_PCIE_SNOC 90 102#define SM8250_SLAVE_MNOC_HF_MEM_NOC 91 103#define SM8250_SLAVE_MNOC_SF_MEM_NOC 92 --- 61 unchanged lines hidden --- | 96#define SM8250_SLAVE_IPC_ROUTER_CFG 85 97#define SM8250_SLAVE_ISENSE_CFG 86 98#define SM8250_SLAVE_LLCC 87 99#define SM8250_SLAVE_LLCC_CFG 88 100#define SM8250_SLAVE_LPASS 89 101#define SM8250_SLAVE_MEM_NOC_PCIE_SNOC 90 102#define SM8250_SLAVE_MNOC_HF_MEM_NOC 91 103#define SM8250_SLAVE_MNOC_SF_MEM_NOC 92 --- 61 unchanged lines hidden --- |