qp.c (e219aafe50fd546b8686582ddbafd24c3c2eda04) qp.c (2811ba51b04958cd001b6409c9f70e8563376346)
1/*
2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

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27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <linux/module.h>
34#include <rdma/ib_umem.h>
1/*
2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

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27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <linux/module.h>
34#include <rdma/ib_umem.h>
35#include <rdma/ib_cache.h>
35#include "mlx5_ib.h"
36#include "user.h"
37
38/* not supported currently */
39static int wq_signature;
40
41enum {
42 MLX5_IB_ACK_REQ_FREQ = 8,

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1359
1360 return rate + MLX5_STAT_RATE_OFFSET;
1361}
1362
1363static int mlx5_set_path(struct mlx5_ib_dev *dev, const struct ib_ah_attr *ah,
1364 struct mlx5_qp_path *path, u8 port, int attr_mask,
1365 u32 path_flags, const struct ib_qp_attr *attr)
1366{
36#include "mlx5_ib.h"
37#include "user.h"
38
39/* not supported currently */
40static int wq_signature;
41
42enum {
43 MLX5_IB_ACK_REQ_FREQ = 8,

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1360
1361 return rate + MLX5_STAT_RATE_OFFSET;
1362}
1363
1364static int mlx5_set_path(struct mlx5_ib_dev *dev, const struct ib_ah_attr *ah,
1365 struct mlx5_qp_path *path, u8 port, int attr_mask,
1366 u32 path_flags, const struct ib_qp_attr *attr)
1367{
1368 enum rdma_link_layer ll = rdma_port_get_link_layer(&dev->ib_dev, port);
1367 int err;
1368
1369 int err;
1370
1369 path->fl = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0;
1370 path->free_ar = (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x80 : 0;
1371
1372 if (attr_mask & IB_QP_PKEY_INDEX)
1373 path->pkey_index = attr->pkey_index;
1374
1371 if (attr_mask & IB_QP_PKEY_INDEX)
1372 path->pkey_index = attr->pkey_index;
1373
1375 path->grh_mlid = ah->src_path_bits & 0x7f;
1376 path->rlid = cpu_to_be16(ah->dlid);
1377
1378 if (ah->ah_flags & IB_AH_GRH) {
1379 if (ah->grh.sgid_index >=
1380 dev->mdev->port_caps[port - 1].gid_table_len) {
1381 pr_err("sgid_index (%u) too large. max is %d\n",
1382 ah->grh.sgid_index,
1383 dev->mdev->port_caps[port - 1].gid_table_len);
1384 return -EINVAL;
1385 }
1374 if (ah->ah_flags & IB_AH_GRH) {
1375 if (ah->grh.sgid_index >=
1376 dev->mdev->port_caps[port - 1].gid_table_len) {
1377 pr_err("sgid_index (%u) too large. max is %d\n",
1378 ah->grh.sgid_index,
1379 dev->mdev->port_caps[port - 1].gid_table_len);
1380 return -EINVAL;
1381 }
1386 path->grh_mlid |= 1 << 7;
1382 }
1383
1384 if (ll == IB_LINK_LAYER_ETHERNET) {
1385 if (!(ah->ah_flags & IB_AH_GRH))
1386 return -EINVAL;
1387 memcpy(path->rmac, ah->dmac, sizeof(ah->dmac));
1388 path->udp_sport = mlx5_get_roce_udp_sport(dev, port,
1389 ah->grh.sgid_index);
1390 path->dci_cfi_prio_sl = (ah->sl & 0x7) << 4;
1391 } else {
1392 path->fl = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0;
1393 path->free_ar = (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x80 :
1394 0;
1395 path->rlid = cpu_to_be16(ah->dlid);
1396 path->grh_mlid = ah->src_path_bits & 0x7f;
1397 if (ah->ah_flags & IB_AH_GRH)
1398 path->grh_mlid |= 1 << 7;
1399 path->dci_cfi_prio_sl = ah->sl & 0xf;
1400 }
1401
1402 if (ah->ah_flags & IB_AH_GRH) {
1387 path->mgid_index = ah->grh.sgid_index;
1388 path->hop_limit = ah->grh.hop_limit;
1389 path->tclass_flowlabel =
1390 cpu_to_be32((ah->grh.traffic_class << 20) |
1391 (ah->grh.flow_label));
1392 memcpy(path->rgid, ah->grh.dgid.raw, 16);
1393 }
1394
1395 err = ib_rate_to_mlx5(dev, ah->static_rate);
1396 if (err < 0)
1397 return err;
1398 path->static_rate = err;
1399 path->port = port;
1400
1401 if (attr_mask & IB_QP_TIMEOUT)
1402 path->ackto_lt = attr->timeout << 3;
1403
1403 path->mgid_index = ah->grh.sgid_index;
1404 path->hop_limit = ah->grh.hop_limit;
1405 path->tclass_flowlabel =
1406 cpu_to_be32((ah->grh.traffic_class << 20) |
1407 (ah->grh.flow_label));
1408 memcpy(path->rgid, ah->grh.dgid.raw, 16);
1409 }
1410
1411 err = ib_rate_to_mlx5(dev, ah->static_rate);
1412 if (err < 0)
1413 return err;
1414 path->static_rate = err;
1415 path->port = port;
1416
1417 if (attr_mask & IB_QP_TIMEOUT)
1418 path->ackto_lt = attr->timeout << 3;
1419
1404 path->sl = ah->sl & 0xf;
1405
1406 return 0;
1407}
1408
1409static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = {
1410 [MLX5_QP_STATE_INIT] = {
1411 [MLX5_QP_STATE_INIT] = {
1412 [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE |
1413 MLX5_QP_OPTPAR_RAE |

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1760int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1761 int attr_mask, struct ib_udata *udata)
1762{
1763 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
1764 struct mlx5_ib_qp *qp = to_mqp(ibqp);
1765 enum ib_qp_state cur_state, new_state;
1766 int err = -EINVAL;
1767 int port;
1420 return 0;
1421}
1422
1423static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = {
1424 [MLX5_QP_STATE_INIT] = {
1425 [MLX5_QP_STATE_INIT] = {
1426 [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE |
1427 MLX5_QP_OPTPAR_RAE |

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1774int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1775 int attr_mask, struct ib_udata *udata)
1776{
1777 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
1778 struct mlx5_ib_qp *qp = to_mqp(ibqp);
1779 enum ib_qp_state cur_state, new_state;
1780 int err = -EINVAL;
1781 int port;
1782 enum rdma_link_layer ll = IB_LINK_LAYER_UNSPECIFIED;
1768
1769 mutex_lock(&qp->mutex);
1770
1771 cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state;
1772 new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
1773
1783
1784 mutex_lock(&qp->mutex);
1785
1786 cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state;
1787 new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
1788
1789 if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) {
1790 port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
1791 ll = dev->ib_dev.get_link_layer(&dev->ib_dev, port);
1792 }
1793
1774 if (ibqp->qp_type != MLX5_IB_QPT_REG_UMR &&
1775 !ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type, attr_mask,
1794 if (ibqp->qp_type != MLX5_IB_QPT_REG_UMR &&
1795 !ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type, attr_mask,
1776 IB_LINK_LAYER_UNSPECIFIED))
1796 ll))
1777 goto out;
1778
1779 if ((attr_mask & IB_QP_PORT) &&
1780 (attr->port_num == 0 ||
1781 attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)))
1782 goto out;
1783
1784 if (attr_mask & IB_QP_PKEY_INDEX) {

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2998
2999 memset(ib_ah_attr, 0, sizeof(*ib_ah_attr));
3000 ib_ah_attr->port_num = path->port;
3001
3002 if (ib_ah_attr->port_num == 0 ||
3003 ib_ah_attr->port_num > MLX5_CAP_GEN(dev, num_ports))
3004 return;
3005
1797 goto out;
1798
1799 if ((attr_mask & IB_QP_PORT) &&
1800 (attr->port_num == 0 ||
1801 attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)))
1802 goto out;
1803
1804 if (attr_mask & IB_QP_PKEY_INDEX) {

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3018
3019 memset(ib_ah_attr, 0, sizeof(*ib_ah_attr));
3020 ib_ah_attr->port_num = path->port;
3021
3022 if (ib_ah_attr->port_num == 0 ||
3023 ib_ah_attr->port_num > MLX5_CAP_GEN(dev, num_ports))
3024 return;
3025
3006 ib_ah_attr->sl = path->sl & 0xf;
3026 ib_ah_attr->sl = path->dci_cfi_prio_sl & 0xf;
3007
3008 ib_ah_attr->dlid = be16_to_cpu(path->rlid);
3009 ib_ah_attr->src_path_bits = path->grh_mlid & 0x7f;
3010 ib_ah_attr->static_rate = path->static_rate ? path->static_rate - 5 : 0;
3011 ib_ah_attr->ah_flags = (path->grh_mlid & (1 << 7)) ? IB_AH_GRH : 0;
3012 if (ib_ah_attr->ah_flags) {
3013 ib_ah_attr->grh.sgid_index = path->mgid_index;
3014 ib_ah_attr->grh.hop_limit = path->hop_limit;

--- 149 unchanged lines hidden --- 		3027
3028 ib_ah_attr->dlid = be16_to_cpu(path->rlid);
3029 ib_ah_attr->src_path_bits = path->grh_mlid & 0x7f;
3030 ib_ah_attr->static_rate = path->static_rate ? path->static_rate - 5 : 0;
3031 ib_ah_attr->ah_flags = (path->grh_mlid & (1 << 7)) ? IB_AH_GRH : 0;
3032 if (ib_ah_attr->ah_flags) {
3033 ib_ah_attr->grh.sgid_index = path->mgid_index;
3034 ib_ah_attr->grh.hop_limit = path->hop_limit;

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