vic.c (c74a7469f97c0f40b46e82ee979f9fb1bb6e847c) | vic.c (0dc34e19f66eb84744af2fea4235302da39fd7e7) |
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1/* 2 * Copyright (c) 2015, NVIDIA Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 --- 24 unchanged lines hidden (view full) --- 33 bool booted; 34 35 void __iomem *regs; 36 struct tegra_drm_client client; 37 struct host1x_channel *channel; 38 struct iommu_domain *domain; 39 struct device *dev; 40 struct clk *clk; | 1/* 2 * Copyright (c) 2015, NVIDIA Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 --- 24 unchanged lines hidden (view full) --- 33 bool booted; 34 35 void __iomem *regs; 36 struct tegra_drm_client client; 37 struct host1x_channel *channel; 38 struct iommu_domain *domain; 39 struct device *dev; 40 struct clk *clk; |
41 struct reset_control *rst; |
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41 42 /* Platform configuration */ 43 const struct vic_config *config; 44}; 45 46static inline struct vic *to_vic(struct tegra_drm_client *client) 47{ 48 return container_of(client, struct vic, client); 49} 50 51static void vic_writel(struct vic *vic, u32 value, unsigned int offset) 52{ 53 writel(value, vic->regs + offset); 54} 55 56static int vic_runtime_resume(struct device *dev) 57{ 58 struct vic *vic = dev_get_drvdata(dev); | 42 43 /* Platform configuration */ 44 const struct vic_config *config; 45}; 46 47static inline struct vic *to_vic(struct tegra_drm_client *client) 48{ 49 return container_of(client, struct vic, client); 50} 51 52static void vic_writel(struct vic *vic, u32 value, unsigned int offset) 53{ 54 writel(value, vic->regs + offset); 55} 56 57static int vic_runtime_resume(struct device *dev) 58{ 59 struct vic *vic = dev_get_drvdata(dev); |
60 int err; |
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59 | 61 |
60 return clk_prepare_enable(vic->clk); | 62 err = clk_prepare_enable(vic->clk); 63 if (err < 0) 64 return err; 65 66 usleep_range(10, 20); 67 68 err = reset_control_deassert(vic->rst); 69 if (err < 0) 70 goto disable; 71 72 usleep_range(10, 20); 73 74 return 0; 75 76disable: 77 clk_disable_unprepare(vic->clk); 78 return err; |
61} 62 63static int vic_runtime_suspend(struct device *dev) 64{ 65 struct vic *vic = dev_get_drvdata(dev); | 79} 80 81static int vic_runtime_suspend(struct device *dev) 82{ 83 struct vic *vic = dev_get_drvdata(dev); |
84 int err; |
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66 | 85 |
86 err = reset_control_assert(vic->rst); 87 if (err < 0) 88 return err; 89 90 usleep_range(2000, 4000); 91 |
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67 clk_disable_unprepare(vic->clk); 68 69 vic->booted = false; 70 71 return 0; 72} 73 74static int vic_boot(struct vic *vic) --- 243 unchanged lines hidden (view full) --- 318 return PTR_ERR(vic->regs); 319 320 vic->clk = devm_clk_get(dev, NULL); 321 if (IS_ERR(vic->clk)) { 322 dev_err(&pdev->dev, "failed to get clock\n"); 323 return PTR_ERR(vic->clk); 324 } 325 | 92 clk_disable_unprepare(vic->clk); 93 94 vic->booted = false; 95 96 return 0; 97} 98 99static int vic_boot(struct vic *vic) --- 243 unchanged lines hidden (view full) --- 343 return PTR_ERR(vic->regs); 344 345 vic->clk = devm_clk_get(dev, NULL); 346 if (IS_ERR(vic->clk)) { 347 dev_err(&pdev->dev, "failed to get clock\n"); 348 return PTR_ERR(vic->clk); 349 } 350 |
351 if (!dev->pm_domain) { 352 vic->rst = devm_reset_control_get(dev, "vic"); 353 if (IS_ERR(vic->rst)) { 354 dev_err(&pdev->dev, "failed to get reset\n"); 355 return PTR_ERR(vic->rst); 356 } 357 } 358 |
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326 vic->falcon.dev = dev; 327 vic->falcon.regs = vic->regs; 328 vic->falcon.ops = &vic_falcon_ops; 329 330 err = falcon_init(&vic->falcon); 331 if (err < 0) 332 return err; 333 --- 87 unchanged lines hidden --- | 359 vic->falcon.dev = dev; 360 vic->falcon.regs = vic->regs; 361 vic->falcon.ops = &vic_falcon_ops; 362 363 err = falcon_init(&vic->falcon); 364 if (err < 0) 365 return err; 366 --- 87 unchanged lines hidden --- |