hdmi.h (5e2aa2ed08e2e280121dc7cf5609c87d464f12ef) hdmi.h (5c1c071a3667600d1b8426dba031b2d4a20a3efa)
1/*
2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */

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196#define SOR_CSTM_MODE_TMDS (1 << 12)
197#define SOR_CSTM_MODE_MASK (3 << 12)
198
199#define HDMI_NV_PDISP_SOR_LVDS 0x5b
200#define HDMI_NV_PDISP_SOR_CRCA 0x5c
201#define HDMI_NV_PDISP_SOR_CRCB 0x5d
202#define HDMI_NV_PDISP_SOR_BLANK 0x5e
203#define HDMI_NV_PDISP_SOR_SEQ_CTL 0x5f
1/*
2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */

--- 187 unchanged lines hidden (view full) ---

196#define SOR_CSTM_MODE_TMDS (1 << 12)
197#define SOR_CSTM_MODE_MASK (3 << 12)
198
199#define HDMI_NV_PDISP_SOR_LVDS 0x5b
200#define HDMI_NV_PDISP_SOR_CRCA 0x5c
201#define HDMI_NV_PDISP_SOR_CRCB 0x5d
202#define HDMI_NV_PDISP_SOR_BLANK 0x5e
203#define HDMI_NV_PDISP_SOR_SEQ_CTL 0x5f
204#define SOR_SEQ_CTL_PU_PC(x) (((x) & 0xf) << 0)
204#define SOR_SEQ_PU_PC(x) (((x) & 0xf) << 0)
205#define SOR_SEQ_PU_PC_ALT(x) (((x) & 0xf) << 4)
206#define SOR_SEQ_PD_PC(x) (((x) & 0xf) << 8)
207#define SOR_SEQ_PD_PC_ALT(x) (((x) & 0xf) << 12)
208#define SOR_SEQ_PC(x) (((x) & 0xf) << 16)
209#define SOR_SEQ_STATUS (1 << 28)
210#define SOR_SEQ_SWITCH (1 << 30)
211
212#define HDMI_NV_PDISP_SOR_SEQ_INST(x) (0x60 + (x))

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205#define SOR_SEQ_PU_PC_ALT(x) (((x) & 0xf) << 4)
206#define SOR_SEQ_PD_PC(x) (((x) & 0xf) << 8)
207#define SOR_SEQ_PD_PC_ALT(x) (((x) & 0xf) << 12)
208#define SOR_SEQ_PC(x) (((x) & 0xf) << 16)
209#define SOR_SEQ_STATUS (1 << 28)
210#define SOR_SEQ_SWITCH (1 << 30)
211
212#define HDMI_NV_PDISP_SOR_SEQ_INST(x) (0x60 + (x))

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