gr3d.c (2421b20d659069ed6435b27a919e627b74c27e7e) gr3d.c (58ed47adcabb4ce13a60f56230074805957822fa)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2013 Avionic Design GmbH
4 * Copyright (C) 2013 NVIDIA Corporation
5 */
6
7#include <linux/clk.h>
8#include <linux/delay.h>

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131 .init = gr3d_init,
132 .exit = gr3d_exit,
133};
134
135static int gr3d_open_channel(struct tegra_drm_client *client,
136 struct tegra_drm_context *context)
137{
138 struct gr3d *gr3d = to_gr3d(client);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2013 Avionic Design GmbH
4 * Copyright (C) 2013 NVIDIA Corporation
5 */
6
7#include <linux/clk.h>
8#include <linux/delay.h>

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131 .init = gr3d_init,
132 .exit = gr3d_exit,
133};
134
135static int gr3d_open_channel(struct tegra_drm_client *client,
136 struct tegra_drm_context *context)
137{
138 struct gr3d *gr3d = to_gr3d(client);
139 int err;
140
139
141 err = pm_runtime_resume_and_get(client->base.dev);
142 if (err)
143 return err;
144
145 context->channel = host1x_channel_get(gr3d->channel);
140 context->channel = host1x_channel_get(gr3d->channel);
146 if (!context->channel) {
147 pm_runtime_put(client->base.dev);
141 if (!context->channel)
148 return -ENOMEM;
142 return -ENOMEM;
149 }
150
151 return 0;
152}
153
154static void gr3d_close_channel(struct tegra_drm_context *context)
155{
156 host1x_channel_put(context->channel);
143
144 return 0;
145}
146
147static void gr3d_close_channel(struct tegra_drm_context *context)
148{
149 host1x_channel_put(context->channel);
157 pm_runtime_put(context->client->base.dev);
158}
159
160static int gr3d_is_addr_reg(struct device *dev, u32 class, u32 offset)
161{
162 struct gr3d *gr3d = dev_get_drvdata(dev);
163
164 switch (class) {
165 case HOST1X_CLASS_HOST1X:

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150}
151
152static int gr3d_is_addr_reg(struct device *dev, u32 class, u32 offset)
153{
154 struct gr3d *gr3d = dev_get_drvdata(dev);
155
156 switch (class) {
157 case HOST1X_CLASS_HOST1X:

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