rv515.c (e199e6136ce6b151e6638ae93dca60748424d900) rv515.c (724c80e1d630296d1324859e964d80d35007d83c)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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381 rv515_gpu_init(rdev);
382 /* Initialize GART (initialize after TTM so we can allocate
383 * memory through TTM but finalize after TTM) */
384 if (rdev->flags & RADEON_IS_PCIE) {
385 r = rv370_pcie_gart_enable(rdev);
386 if (r)
387 return r;
388 }
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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381 rv515_gpu_init(rdev);
382 /* Initialize GART (initialize after TTM so we can allocate
383 * memory through TTM but finalize after TTM) */
384 if (rdev->flags & RADEON_IS_PCIE) {
385 r = rv370_pcie_gart_enable(rdev);
386 if (r)
387 return r;
388 }
389
390 /* allocate wb buffer */
391 r = radeon_wb_init(rdev);
392 if (r)
393 return r;
394
389 /* Enable IRQ */
390 rs600_irq_set(rdev);
391 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
392 /* 1M ring buffer */
393 r = r100_cp_init(rdev, 1024 * 1024);
394 if (r) {
395 dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
396 return r;
397 }
395 /* Enable IRQ */
396 rs600_irq_set(rdev);
397 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
398 /* 1M ring buffer */
399 r = r100_cp_init(rdev, 1024 * 1024);
400 if (r) {
401 dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
402 return r;
403 }
398 r = r100_wb_init(rdev);
399 if (r)
400 dev_err(rdev->dev, "failled initializing WB (%d).\n", r);
401 r = r100_ib_init(rdev);
402 if (r) {
403 dev_err(rdev->dev, "failled initializing IB (%d).\n", r);
404 return r;
405 }
406 return 0;
407}
408

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426 /* Initialize surface registers */
427 radeon_surface_init(rdev);
428 return rv515_startup(rdev);
429}
430
431int rv515_suspend(struct radeon_device *rdev)
432{
433 r100_cp_disable(rdev);
404 r = r100_ib_init(rdev);
405 if (r) {
406 dev_err(rdev->dev, "failled initializing IB (%d).\n", r);
407 return r;
408 }
409 return 0;
410}
411

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429 /* Initialize surface registers */
430 radeon_surface_init(rdev);
431 return rv515_startup(rdev);
432}
433
434int rv515_suspend(struct radeon_device *rdev)
435{
436 r100_cp_disable(rdev);
434 r100_wb_disable(rdev);
437 radeon_wb_disable(rdev);
435 rs600_irq_disable(rdev);
436 if (rdev->flags & RADEON_IS_PCIE)
437 rv370_pcie_gart_disable(rdev);
438 return 0;
439}
440
441void rv515_set_safe_registers(struct radeon_device *rdev)
442{
443 rdev->config.r300.reg_safe_bm = rv515_reg_safe_bm;
444 rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rv515_reg_safe_bm);
445}
446
447void rv515_fini(struct radeon_device *rdev)
448{
449 r100_cp_fini(rdev);
438 rs600_irq_disable(rdev);
439 if (rdev->flags & RADEON_IS_PCIE)
440 rv370_pcie_gart_disable(rdev);
441 return 0;
442}
443
444void rv515_set_safe_registers(struct radeon_device *rdev)
445{
446 rdev->config.r300.reg_safe_bm = rv515_reg_safe_bm;
447 rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rv515_reg_safe_bm);
448}
449
450void rv515_fini(struct radeon_device *rdev)
451{
452 r100_cp_fini(rdev);
450 r100_wb_fini(rdev);
453 radeon_wb_fini(rdev);
451 r100_ib_fini(rdev);
452 radeon_gem_fini(rdev);
453 rv370_pcie_gart_fini(rdev);
454 radeon_agp_fini(rdev);
455 radeon_irq_kms_fini(rdev);
456 radeon_fence_driver_fini(rdev);
457 radeon_bo_fini(rdev);
458 radeon_atombios_fini(rdev);

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522 return r;
523 rv515_set_safe_registers(rdev);
524 rdev->accel_working = true;
525 r = rv515_startup(rdev);
526 if (r) {
527 /* Somethings want wront with the accel init stop accel */
528 dev_err(rdev->dev, "Disabling GPU acceleration\n");
529 r100_cp_fini(rdev);
454 r100_ib_fini(rdev);
455 radeon_gem_fini(rdev);
456 rv370_pcie_gart_fini(rdev);
457 radeon_agp_fini(rdev);
458 radeon_irq_kms_fini(rdev);
459 radeon_fence_driver_fini(rdev);
460 radeon_bo_fini(rdev);
461 radeon_atombios_fini(rdev);

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525 return r;
526 rv515_set_safe_registers(rdev);
527 rdev->accel_working = true;
528 r = rv515_startup(rdev);
529 if (r) {
530 /* Somethings want wront with the accel init stop accel */
531 dev_err(rdev->dev, "Disabling GPU acceleration\n");
532 r100_cp_fini(rdev);
530 r100_wb_fini(rdev);
533 radeon_wb_fini(rdev);
531 r100_ib_fini(rdev);
532 radeon_irq_kms_fini(rdev);
533 rv370_pcie_gart_fini(rdev);
534 radeon_agp_fini(rdev);
535 rdev->accel_working = false;
536 }
537 return 0;
538}

--- 563 unchanged lines hidden --- 		534 r100_ib_fini(rdev);
535 radeon_irq_kms_fini(rdev);
536 rv370_pcie_gart_fini(rdev);
537 radeon_agp_fini(rdev);
538 rdev->accel_working = false;
539 }
540 return 0;
541}

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