rv515.c (0898782247ae533d1f4e47a06bc5d4870931b284) rv515.c (5b54d6797994fe93432970145c93b9747a3c8d6c)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

--- 15 unchanged lines hidden (view full) ---

24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28
29#include <linux/seq_file.h>
30#include <linux/slab.h>
31
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

--- 15 unchanged lines hidden (view full) ---

24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28
29#include <linux/seq_file.h>
30#include <linux/slab.h>
31
32#include <drm/drm_debugfs.h>
33#include <drm/drm_device.h>
34#include <drm/drm_file.h>
35
36#include "atom.h"
37#include "radeon.h"
38#include "radeon_asic.h"
39#include "rv515_reg_safe.h"
40#include "rv515d.h"
41
42/* This files gather functions specifics to: rv515 */
32#include <drm/drm_device.h>
33#include <drm/drm_file.h>
34
35#include "atom.h"
36#include "radeon.h"
37#include "radeon_asic.h"
38#include "rv515_reg_safe.h"
39#include "rv515d.h"
40
41/* This files gather functions specifics to: rv515 */
43static int rv515_debugfs_pipes_info_init(struct radeon_device *rdev);
44static int rv515_debugfs_ga_info_init(struct radeon_device *rdev);
45static void rv515_gpu_init(struct radeon_device *rdev);
46int rv515_mc_wait_for_idle(struct radeon_device *rdev);
47
48static const u32 crtc_offsets[2] =
49{
50 0,
51 AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL
52};
53
42static void rv515_gpu_init(struct radeon_device *rdev);
43int rv515_mc_wait_for_idle(struct radeon_device *rdev);
44
45static const u32 crtc_offsets[2] =
46{
47 0,
48 AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL
49};
50
54void rv515_debugfs(struct radeon_device *rdev)
55{
56 if (r100_debugfs_rbbm_init(rdev)) {
57 DRM_ERROR("Failed to register debugfs file for RBBM !\n");
58 }
59 if (rv515_debugfs_pipes_info_init(rdev)) {
60 DRM_ERROR("Failed to register debugfs file for pipes !\n");
61 }
62 if (rv515_debugfs_ga_info_init(rdev)) {
63 DRM_ERROR("Failed to register debugfs file for pipes !\n");
64 }
65}
66
67void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
68{
69 int r;
70
71 r = radeon_ring_lock(rdev, ring, 64);
72 if (r) {
73 return;
74 }

--- 155 unchanged lines hidden (view full) ---

230 spin_lock_irqsave(&rdev->mc_idx_lock, flags);
231 WREG32(MC_IND_INDEX, 0xff0000 | ((reg) & 0xffff));
232 WREG32(MC_IND_DATA, (v));
233 WREG32(MC_IND_INDEX, 0);
234 spin_unlock_irqrestore(&rdev->mc_idx_lock, flags);
235}
236
237#if defined(CONFIG_DEBUG_FS)
51void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
52{
53 int r;
54
55 r = radeon_ring_lock(rdev, ring, 64);
56 if (r) {
57 return;
58 }

--- 155 unchanged lines hidden (view full) ---

214 spin_lock_irqsave(&rdev->mc_idx_lock, flags);
215 WREG32(MC_IND_INDEX, 0xff0000 | ((reg) & 0xffff));
216 WREG32(MC_IND_DATA, (v));
217 WREG32(MC_IND_INDEX, 0);
218 spin_unlock_irqrestore(&rdev->mc_idx_lock, flags);
219}
220
221#if defined(CONFIG_DEBUG_FS)
238static int rv515_debugfs_pipes_info(struct seq_file *m, void *data)
222static int rv515_debugfs_pipes_info_show(struct seq_file *m, void *unused)
239{
223{
240 struct drm_info_node *node = (struct drm_info_node *) m->private;
241 struct drm_device *dev = node->minor->dev;
242 struct radeon_device *rdev = dev->dev_private;
224 struct radeon_device *rdev = (struct radeon_device *)m->private;
243 uint32_t tmp;
244
245 tmp = RREG32(GB_PIPE_SELECT);
246 seq_printf(m, "GB_PIPE_SELECT 0x%08x\n", tmp);
247 tmp = RREG32(SU_REG_DEST);
248 seq_printf(m, "SU_REG_DEST 0x%08x\n", tmp);
249 tmp = RREG32(GB_TILE_CONFIG);
250 seq_printf(m, "GB_TILE_CONFIG 0x%08x\n", tmp);
251 tmp = RREG32(DST_PIPE_CONFIG);
252 seq_printf(m, "DST_PIPE_CONFIG 0x%08x\n", tmp);
253 return 0;
254}
255
225 uint32_t tmp;
226
227 tmp = RREG32(GB_PIPE_SELECT);
228 seq_printf(m, "GB_PIPE_SELECT 0x%08x\n", tmp);
229 tmp = RREG32(SU_REG_DEST);
230 seq_printf(m, "SU_REG_DEST 0x%08x\n", tmp);
231 tmp = RREG32(GB_TILE_CONFIG);
232 seq_printf(m, "GB_TILE_CONFIG 0x%08x\n", tmp);
233 tmp = RREG32(DST_PIPE_CONFIG);
234 seq_printf(m, "DST_PIPE_CONFIG 0x%08x\n", tmp);
235 return 0;
236}
237
256static int rv515_debugfs_ga_info(struct seq_file *m, void *data)
238static int rv515_debugfs_ga_info_show(struct seq_file *m, void *unused)
257{
239{
258 struct drm_info_node *node = (struct drm_info_node *) m->private;
259 struct drm_device *dev = node->minor->dev;
260 struct radeon_device *rdev = dev->dev_private;
240 struct radeon_device *rdev = (struct radeon_device *)m->private;
261 uint32_t tmp;
262
263 tmp = RREG32(0x2140);
264 seq_printf(m, "VAP_CNTL_STATUS 0x%08x\n", tmp);
265 radeon_asic_reset(rdev);
266 tmp = RREG32(0x425C);
267 seq_printf(m, "GA_IDLE 0x%08x\n", tmp);
268 return 0;
269}
270
241 uint32_t tmp;
242
243 tmp = RREG32(0x2140);
244 seq_printf(m, "VAP_CNTL_STATUS 0x%08x\n", tmp);
245 radeon_asic_reset(rdev);
246 tmp = RREG32(0x425C);
247 seq_printf(m, "GA_IDLE 0x%08x\n", tmp);
248 return 0;
249}
250
271static struct drm_info_list rv515_pipes_info_list[] = {
272 {"rv515_pipes_info", rv515_debugfs_pipes_info, 0, NULL},
273};
274
275static struct drm_info_list rv515_ga_info_list[] = {
276 {"rv515_ga_info", rv515_debugfs_ga_info, 0, NULL},
277};
251DEFINE_SHOW_ATTRIBUTE(rv515_debugfs_pipes_info);
252DEFINE_SHOW_ATTRIBUTE(rv515_debugfs_ga_info);
278#endif
279
253#endif
254
280static int rv515_debugfs_pipes_info_init(struct radeon_device *rdev)
255void rv515_debugfs(struct radeon_device *rdev)
281{
282#if defined(CONFIG_DEBUG_FS)
256{
257#if defined(CONFIG_DEBUG_FS)
283 return radeon_debugfs_add_files(rdev, rv515_pipes_info_list, 1);
284#else
285 return 0;
286#endif
287}
258 struct dentry *root = rdev->ddev->primary->debugfs_root;
288
259
289static int rv515_debugfs_ga_info_init(struct radeon_device *rdev)
290{
291#if defined(CONFIG_DEBUG_FS)
292 return radeon_debugfs_add_files(rdev, rv515_ga_info_list, 1);
293#else
294 return 0;
260 debugfs_create_file("rv515_pipes_info", 0444, root, rdev,
261 &rv515_debugfs_pipes_info_fops);
262 debugfs_create_file("rv515_ga_info", 0444, root, rdev,
263 &rv515_debugfs_ga_info_fops);
295#endif
264#endif
265 r100_debugfs_rbbm_init(rdev);
296}
297
298void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save)
299{
300 u32 crtc_enabled, tmp, frame_count, blackout;
301 int i, j;
302
303 save->vga_render_control = RREG32(R_000300_VGA_RENDER_CONTROL);

--- 1005 unchanged lines hidden --- 		266}
267
268void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save)
269{
270 u32 crtc_enabled, tmp, frame_count, blackout;
271 int i, j;
272
273 save->vga_render_control = RREG32(R_000300_VGA_RENDER_CONTROL);

--- 1005 unchanged lines hidden ---