rs600.c (12e04ffcd93b25dfd726d46338c2ee7d23de556e) rs600.c (e49f3959a96dc279860af7e86e6dbcfda50580a5)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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918
919 r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX);
920 if (r) {
921 dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r);
922 return r;
923 }
924
925 /* Enable IRQ */
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

--- 909 unchanged lines hidden (view full) ---

918
919 r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX);
920 if (r) {
921 dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r);
922 return r;
923 }
924
925 /* Enable IRQ */
926 if (!rdev->irq.installed) {
927 r = radeon_irq_kms_init(rdev);
928 if (r)
929 return r;
930 }
931
926 rs600_irq_set(rdev);
927 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
928 /* 1M ring buffer */
929 r = r100_cp_init(rdev, 1024 * 1024);
930 if (r) {
931 dev_err(rdev->dev, "failed initializing CP (%d).\n", r);
932 return r;
933 }

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1042 radeon_get_clock_info(rdev->ddev);
1043 /* initialize memory controller */
1044 rs600_mc_init(rdev);
1045 rs600_debugfs(rdev);
1046 /* Fence driver */
1047 r = radeon_fence_driver_init(rdev);
1048 if (r)
1049 return r;
932 rs600_irq_set(rdev);
933 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
934 /* 1M ring buffer */
935 r = r100_cp_init(rdev, 1024 * 1024);
936 if (r) {
937 dev_err(rdev->dev, "failed initializing CP (%d).\n", r);
938 return r;
939 }

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1048 radeon_get_clock_info(rdev->ddev);
1049 /* initialize memory controller */
1050 rs600_mc_init(rdev);
1051 rs600_debugfs(rdev);
1052 /* Fence driver */
1053 r = radeon_fence_driver_init(rdev);
1054 if (r)
1055 return r;
1050 r = radeon_irq_kms_init(rdev);
1051 if (r)
1052 return r;
1053 /* Memory manager */
1054 r = radeon_bo_init(rdev);
1055 if (r)
1056 return r;
1057 r = rs600_gart_init(rdev);
1058 if (r)
1059 return r;
1060 rs600_set_safe_registers(rdev);

--- 15 unchanged lines hidden --- 		1056 /* Memory manager */
1057 r = radeon_bo_init(rdev);
1058 if (r)
1059 return r;
1060 r = rs600_gart_init(rdev);
1061 if (r)
1062 return r;
1063 rs600_set_safe_registers(rdev);

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