evergreen.c (1b37078b7ddf35cab12ac6544187e3636d50c0dc) evergreen.c (b15ba51207e54245409d6f46e20dab36f906eed1)
1/*
2 * Copyright 2010 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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3177 return r;
3178 r = evergreen_cp_load_microcode(rdev);
3179 if (r)
3180 return r;
3181 r = evergreen_cp_resume(rdev);
3182 if (r)
3183 return r;
3184
1/*
2 * Copyright 2010 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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3177 return r;
3178 r = evergreen_cp_load_microcode(rdev);
3179 if (r)
3180 return r;
3181 r = evergreen_cp_resume(rdev);
3182 if (r)
3183 return r;
3184
3185 r = radeon_ib_pool_start(rdev);
3186 if (r)
3187 return r;
3188
3189 r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
3190 if (r) {
3191 DRM_ERROR("radeon: failed testing IB (%d).\n", r);
3192 rdev->accel_working = false;
3193 return r;
3194 }
3195
3185 return 0;
3186}
3187
3188int evergreen_resume(struct radeon_device *rdev)
3189{
3190 int r;
3191
3192 /* reset the asic, the gfx blocks are often in a bad state
3193 * after the driver is unloaded or after a resume
3194 */
3195 if (radeon_asic_reset(rdev))
3196 dev_warn(rdev->dev, "GPU reset failed !\n");
3197 /* Do not reset GPU before posting, on rv770 hw unlike on r500 hw,
3198 * posting will perform necessary task to bring back GPU into good
3199 * shape.
3200 */
3201 /* post card */
3202 atom_asic_init(rdev->mode_info.atom_context);
3203
3196 return 0;
3197}
3198
3199int evergreen_resume(struct radeon_device *rdev)
3200{
3201 int r;
3202
3203 /* reset the asic, the gfx blocks are often in a bad state
3204 * after the driver is unloaded or after a resume
3205 */
3206 if (radeon_asic_reset(rdev))
3207 dev_warn(rdev->dev, "GPU reset failed !\n");
3208 /* Do not reset GPU before posting, on rv770 hw unlike on r500 hw,
3209 * posting will perform necessary task to bring back GPU into good
3210 * shape.
3211 */
3212 /* post card */
3213 atom_asic_init(rdev->mode_info.atom_context);
3214
3215 rdev->accel_working = true;
3204 r = evergreen_startup(rdev);
3205 if (r) {
3206 DRM_ERROR("evergreen startup failed on resume\n");
3207 return r;
3208 }
3209
3216 r = evergreen_startup(rdev);
3217 if (r) {
3218 DRM_ERROR("evergreen startup failed on resume\n");
3219 return r;
3220 }
3221
3210 r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
3211 if (r) {
3212 DRM_ERROR("radeon: failed testing IB (%d).\n", r);
3213 return r;
3214 }
3215
3216 return r;
3217
3218}
3219
3220int evergreen_suspend(struct radeon_device *rdev)
3221{
3222 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
3223
3224 /* FIXME: we should wait for ring to be empty */
3222 return r;
3223
3224}
3225
3226int evergreen_suspend(struct radeon_device *rdev)
3227{
3228 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
3229
3230 /* FIXME: we should wait for ring to be empty */
3231 radeon_ib_pool_suspend(rdev);
3232 r600_blit_suspend(rdev);
3225 r700_cp_stop(rdev);
3226 ring->ready = false;
3227 evergreen_irq_suspend(rdev);
3228 radeon_wb_disable(rdev);
3229 evergreen_pcie_gart_disable(rdev);
3233 r700_cp_stop(rdev);
3234 ring->ready = false;
3235 evergreen_irq_suspend(rdev);
3236 radeon_wb_disable(rdev);
3237 evergreen_pcie_gart_disable(rdev);
3230 r600_blit_suspend(rdev);
3231
3232 return 0;
3233}
3234
3235/* Plan is to move initialization in that function and use
3236 * helper function so that radeon_device_init pretty much
3237 * do nothing more than calling asic specific function. This
3238 * should also allow to remove a bunch of callback function

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3307
3308 rdev->ih.ring_obj = NULL;
3309 r600_ih_ring_init(rdev, 64 * 1024);
3310
3311 r = r600_pcie_gart_init(rdev);
3312 if (r)
3313 return r;
3314
3238
3239 return 0;
3240}
3241
3242/* Plan is to move initialization in that function and use
3243 * helper function so that radeon_device_init pretty much
3244 * do nothing more than calling asic specific function. This
3245 * should also allow to remove a bunch of callback function

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3314
3315 rdev->ih.ring_obj = NULL;
3316 r600_ih_ring_init(rdev, 64 * 1024);
3317
3318 r = r600_pcie_gart_init(rdev);
3319 if (r)
3320 return r;
3321
3322 r = radeon_ib_pool_init(rdev);
3315 rdev->accel_working = true;
3323 rdev->accel_working = true;
3324 if (r) {
3325 dev_err(rdev->dev, "IB initialization failed (%d).\n", r);
3326 rdev->accel_working = false;
3327 }
3328
3316 r = evergreen_startup(rdev);
3317 if (r) {
3318 dev_err(rdev->dev, "disabling GPU acceleration\n");
3319 r700_cp_fini(rdev);
3320 r600_irq_fini(rdev);
3321 radeon_wb_fini(rdev);
3329 r = evergreen_startup(rdev);
3330 if (r) {
3331 dev_err(rdev->dev, "disabling GPU acceleration\n");
3332 r700_cp_fini(rdev);
3333 r600_irq_fini(rdev);
3334 radeon_wb_fini(rdev);
3335 r100_ib_fini(rdev);
3322 radeon_irq_kms_fini(rdev);
3323 evergreen_pcie_gart_fini(rdev);
3324 rdev->accel_working = false;
3325 }
3336 radeon_irq_kms_fini(rdev);
3337 evergreen_pcie_gart_fini(rdev);
3338 rdev->accel_working = false;
3339 }
3326 if (rdev->accel_working) {
3327 r = radeon_ib_pool_init(rdev);
3328 if (r) {
3329 DRM_ERROR("radeon: failed initializing IB pool (%d).\n", r);
3330 rdev->accel_working = false;
3331 }
3332 r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
3333 if (r) {
3334 DRM_ERROR("radeon: failed testing IB (%d).\n", r);
3335 rdev->accel_working = false;
3336 }
3337 }
3338 return 0;
3339}
3340
3341void evergreen_fini(struct radeon_device *rdev)
3342{
3343 r600_blit_fini(rdev);
3344 r700_cp_fini(rdev);
3345 r600_irq_fini(rdev);
3346 radeon_wb_fini(rdev);
3340 return 0;
3341}
3342
3343void evergreen_fini(struct radeon_device *rdev)
3344{
3345 r600_blit_fini(rdev);
3346 r700_cp_fini(rdev);
3347 r600_irq_fini(rdev);
3348 radeon_wb_fini(rdev);
3347 radeon_ib_pool_fini(rdev);
3349 r100_ib_fini(rdev);
3348 radeon_irq_kms_fini(rdev);
3349 evergreen_pcie_gart_fini(rdev);
3350 r600_vram_scratch_fini(rdev);
3351 radeon_gem_fini(rdev);
3352 radeon_semaphore_driver_fini(rdev);
3353 radeon_fence_driver_fini(rdev);
3354 radeon_agp_fini(rdev);
3355 radeon_bo_fini(rdev);

--- 56 unchanged lines hidden --- 		3350 radeon_irq_kms_fini(rdev);
3351 evergreen_pcie_gart_fini(rdev);
3352 r600_vram_scratch_fini(rdev);
3353 radeon_gem_fini(rdev);
3354 radeon_semaphore_driver_fini(rdev);
3355 radeon_fence_driver_fini(rdev);
3356 radeon_agp_fini(rdev);
3357 radeon_bo_fini(rdev);

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