base.c (f15cde64b66161bfa74fb58f4e5697d8265b802e) base.c (0e44c21708761977dcbea9b846b51a6fb684907a)
1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22#include "priv.h"
23
24#include <subdev/mc.h>
25#include <subdev/top.h>
26
1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

--- 10 unchanged lines hidden (view full) ---

19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22#include "priv.h"
23
24#include <subdev/mc.h>
25#include <subdev/top.h>
26
27static const struct nvkm_falcon_func_pio *
28nvkm_falcon_pio(struct nvkm_falcon *falcon, enum nvkm_falcon_mem *mem_type, u32 *mem_base)
29{
30 switch (*mem_type) {
31 case IMEM:
32 return falcon->func->imem_pio;
33 case DMEM:
34 if (!falcon->func->emem_addr || *mem_base < falcon->func->emem_addr)
35 return falcon->func->dmem_pio;
36
37 *mem_base -= falcon->func->emem_addr;
38 fallthrough;
39 default:
40 return NULL;
41 }
42}
43
44int
45nvkm_falcon_pio_wr(struct nvkm_falcon *falcon, const u8 *img, u32 img_base, u8 port,
46 enum nvkm_falcon_mem mem_type, u32 mem_base, int len, u16 tag, bool sec)
47{
48 const struct nvkm_falcon_func_pio *pio = nvkm_falcon_pio(falcon, &mem_type, &mem_base);
49 const char *type = nvkm_falcon_mem(mem_type);
50 int xfer_len;
51
52 if (WARN_ON(!pio || !pio->wr))
53 return -EINVAL;
54
55 FLCN_DBG(falcon, "%s %08x <- %08x bytes at %08x", type, mem_base, len, img_base);
56 if (WARN_ON(!len || (len & (pio->min - 1))))
57 return -EINVAL;
58
59 pio->wr_init(falcon, port, sec, mem_base);
60 do {
61 xfer_len = min(len, pio->max);
62 pio->wr(falcon, port, img, xfer_len, tag++);
63
64 if (nvkm_printk_ok(falcon->owner, falcon->user, NV_DBG_TRACE)) {
65 for (img_base = 0; img_base < xfer_len; img_base += 4, mem_base += 4) {
66 if (((img_base / 4) % 8) == 0)
67 printk(KERN_INFO "%s %08x <-", type, mem_base);
68 printk(KERN_CONT " %08x", *(u32 *)(img + img_base));
69 if ((img_base / 4) == 7 && mem_type == IMEM)
70 printk(KERN_CONT " %04x", tag - 1);
71 }
72 }
73
74 img += xfer_len;
75 len -= xfer_len;
76 } while (len);
77
78 return 0;
79}
80
27void
28nvkm_falcon_load_imem(struct nvkm_falcon *falcon, void *data, u32 start,
29 u32 size, u16 tag, u8 port, bool secure)
30{
31 if (secure && !falcon->secret) {
32 nvkm_warn(falcon->user,
33 "writing with secure tag on a non-secure falcon!\n");
34 return;

--- 160 unchanged lines hidden --- 		81void
82nvkm_falcon_load_imem(struct nvkm_falcon *falcon, void *data, u32 start,
83 u32 size, u16 tag, u8 port, bool secure)
84{
85 if (secure && !falcon->secret) {
86 nvkm_warn(falcon->user,
87 "writing with secure tag on a non-secure falcon!\n");
88 return;

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