class.h (e8ff9794923561f51ab73b5f2356aaacad75d432) class.h (8e7e1586c58a5e3893aeae445ef843bb26fb7653)
1#ifndef __NVIF_CLASS_H__
2#define __NVIF_CLASS_H__
3
4/* these class numbers are made up by us, and not nvidia-assigned */
5#define NVIF_CLASS_CONTROL /* if0001.h */ -1
6#define NVIF_CLASS_PERFMON /* if0002.h */ -2
7#define NVIF_CLASS_PERFDOM /* if0003.h */ -3
8#define NVIF_CLASS_SW_NV04 /* if0004.h */ -4

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126#define GF100_MSPPP 0x000090b3
127
128#define G98_SEC 0x000088b4
129
130#define GT212_DMA 0x000085b5
131#define FERMI_DMA 0x000090b5
132#define KEPLER_DMA_COPY_A 0x0000a0b5
133#define MAXWELL_DMA_COPY_A 0x0000b0b5
1#ifndef __NVIF_CLASS_H__
2#define __NVIF_CLASS_H__
3
4/* these class numbers are made up by us, and not nvidia-assigned */
5#define NVIF_CLASS_CONTROL /* if0001.h */ -1
6#define NVIF_CLASS_PERFMON /* if0002.h */ -2
7#define NVIF_CLASS_PERFDOM /* if0003.h */ -3
8#define NVIF_CLASS_SW_NV04 /* if0004.h */ -4

--- 117 unchanged lines hidden (view full) ---

126#define GF100_MSPPP 0x000090b3
127
128#define G98_SEC 0x000088b4
129
130#define GT212_DMA 0x000085b5
131#define FERMI_DMA 0x000090b5
132#define KEPLER_DMA_COPY_A 0x0000a0b5
133#define MAXWELL_DMA_COPY_A 0x0000b0b5
134#define PASCAL_DMA_COPY_A 0x0000c0b5
134
135#define FERMI_DECOMPRESS 0x000090b8
136
137#define FERMI_COMPUTE_A 0x000090c0
138#define FERMI_COMPUTE_B 0x000091c0
139#define KEPLER_COMPUTE_A 0x0000a0c0
140#define KEPLER_COMPUTE_B 0x0000a1c0
141#define MAXWELL_COMPUTE_A 0x0000b0c0
142#define MAXWELL_COMPUTE_B 0x0000b1c0
143
144#define NV74_CIPHER 0x000074c1
145#endif
135
136#define FERMI_DECOMPRESS 0x000090b8
137
138#define FERMI_COMPUTE_A 0x000090c0
139#define FERMI_COMPUTE_B 0x000091c0
140#define KEPLER_COMPUTE_A 0x0000a0c0
141#define KEPLER_COMPUTE_B 0x0000a1c0
142#define MAXWELL_COMPUTE_A 0x0000b0c0
143#define MAXWELL_COMPUTE_B 0x0000b1c0
144
145#define NV74_CIPHER 0x000074c1
146#endif