class.h (82ffd0454bd9bd57780966d47bfd56d579dd4fb3) class.h (8603774233507550d557272146ba1834071e3e49)
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __NVIF_CLASS_H__
3#define __NVIF_CLASS_H__
4
5/* these class numbers are made up by us, and not nvidia-assigned */
6#define NVIF_CLASS_CLIENT /* if0000.h */ -0x00000000
7
8#define NVIF_CLASS_CONTROL /* if0001.h */ -0x00000001

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79#define GF110_DISP /* cl5070.h */ 0x00009070
80#define GK104_DISP /* cl5070.h */ 0x00009170
81#define GK110_DISP /* cl5070.h */ 0x00009270
82#define GM107_DISP /* cl5070.h */ 0x00009470
83#define GM200_DISP /* cl5070.h */ 0x00009570
84#define GP100_DISP /* cl5070.h */ 0x00009770
85#define GP102_DISP /* cl5070.h */ 0x00009870
86#define GV100_DISP /* cl5070.h */ 0x0000c370
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __NVIF_CLASS_H__
3#define __NVIF_CLASS_H__
4
5/* these class numbers are made up by us, and not nvidia-assigned */
6#define NVIF_CLASS_CLIENT /* if0000.h */ -0x00000000
7
8#define NVIF_CLASS_CONTROL /* if0001.h */ -0x00000001

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79#define GF110_DISP /* cl5070.h */ 0x00009070
80#define GK104_DISP /* cl5070.h */ 0x00009170
81#define GK110_DISP /* cl5070.h */ 0x00009270
82#define GM107_DISP /* cl5070.h */ 0x00009470
83#define GM200_DISP /* cl5070.h */ 0x00009570
84#define GP100_DISP /* cl5070.h */ 0x00009770
85#define GP102_DISP /* cl5070.h */ 0x00009870
86#define GV100_DISP /* cl5070.h */ 0x0000c370
87#define TU104_DISP /* cl5070.h */ 0x0000c570
87#define TU102_DISP /* cl5070.h */ 0x0000c570
88
89#define NV31_MPEG 0x00003174
90#define G82_MPEG 0x00008274
91
92#define NV74_VP2 0x00007476
93
94#define NV50_DISP_CURSOR /* cl507a.h */ 0x0000507a
95#define G82_DISP_CURSOR /* cl507a.h */ 0x0000827a
96#define GT214_DISP_CURSOR /* cl507a.h */ 0x0000857a
97#define GF110_DISP_CURSOR /* cl507a.h */ 0x0000907a
98#define GK104_DISP_CURSOR /* cl507a.h */ 0x0000917a
99#define GV100_DISP_CURSOR /* cl507a.h */ 0x0000c37a
88
89#define NV31_MPEG 0x00003174
90#define G82_MPEG 0x00008274
91
92#define NV74_VP2 0x00007476
93
94#define NV50_DISP_CURSOR /* cl507a.h */ 0x0000507a
95#define G82_DISP_CURSOR /* cl507a.h */ 0x0000827a
96#define GT214_DISP_CURSOR /* cl507a.h */ 0x0000857a
97#define GF110_DISP_CURSOR /* cl507a.h */ 0x0000907a
98#define GK104_DISP_CURSOR /* cl507a.h */ 0x0000917a
99#define GV100_DISP_CURSOR /* cl507a.h */ 0x0000c37a
100#define TU104_DISP_CURSOR /* cl507a.h */ 0x0000c57a
100#define TU102_DISP_CURSOR /* cl507a.h */ 0x0000c57a
101
102#define NV50_DISP_OVERLAY /* cl507b.h */ 0x0000507b
103#define G82_DISP_OVERLAY /* cl507b.h */ 0x0000827b
104#define GT214_DISP_OVERLAY /* cl507b.h */ 0x0000857b
105#define GF110_DISP_OVERLAY /* cl507b.h */ 0x0000907b
106#define GK104_DISP_OVERLAY /* cl507b.h */ 0x0000917b
107
108#define GV100_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c37b
101
102#define NV50_DISP_OVERLAY /* cl507b.h */ 0x0000507b
103#define G82_DISP_OVERLAY /* cl507b.h */ 0x0000827b
104#define GT214_DISP_OVERLAY /* cl507b.h */ 0x0000857b
105#define GF110_DISP_OVERLAY /* cl507b.h */ 0x0000907b
106#define GK104_DISP_OVERLAY /* cl507b.h */ 0x0000917b
107
108#define GV100_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c37b
109#define TU104_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c57b
109#define TU102_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c57b
110
111#define NV50_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000507c
112#define G82_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000827c
113#define GT200_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000837c
114#define GT214_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000857c
115#define GF110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000907c
116#define GK104_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000917c
117#define GK110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000927c

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124#define GF110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000907d
125#define GK104_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000917d
126#define GK110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000927d
127#define GM107_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000947d
128#define GM200_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000957d
129#define GP100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000977d
130#define GP102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000987d
131#define GV100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c37d
110
111#define NV50_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000507c
112#define G82_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000827c
113#define GT200_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000837c
114#define GT214_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000857c
115#define GF110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000907c
116#define GK104_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000917c
117#define GK110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000927c

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124#define GF110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000907d
125#define GK104_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000917d
126#define GK110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000927d
127#define GM107_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000947d
128#define GM200_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000957d
129#define GP100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000977d
130#define GP102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000987d
131#define GV100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c37d
132#define TU104_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c57d
132#define TU102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c57d
133
134#define NV50_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000507e
135#define G82_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000827e
136#define GT200_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000837e
137#define GT214_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000857e
138#define GF110_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000907e
139#define GK104_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000917e
140
141#define GV100_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c37e
133
134#define NV50_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000507e
135#define G82_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000827e
136#define GT200_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000837e
137#define GT214_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000857e
138#define GF110_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000907e
139#define GK104_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000917e
140
141#define GV100_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c37e
142#define TU104_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c57e
142#define TU102_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c57e
143
144#define NV50_TESLA 0x00005097
145#define G82_TESLA 0x00008297
146#define GT200_TESLA 0x00008397
147#define GT214_TESLA 0x00008597
148#define GT21A_TESLA 0x00008697
149
150#define FERMI_A /* cl9097.h */ 0x00009097

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144#define NV50_TESLA 0x00005097
145#define G82_TESLA 0x00008297
146#define GT200_TESLA 0x00008397
147#define GT214_TESLA 0x00008597
148#define GT21A_TESLA 0x00008697
149
150#define FERMI_A /* cl9097.h */ 0x00009097

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