| class.h (06db7fded6dec88772a65c5a39af12ba4dc2ad38) | class.h (05d271c32e12c16d18b096c797eef809fd6c9215) |
|---|---|
| 1/* SPDX-License-Identifier: MIT */ 2#ifndef __NVIF_CLASS_H__ 3#define __NVIF_CLASS_H__ 4 5/* these class numbers are made up by us, and not nvidia-assigned */ 6#define NVIF_CLASS_CLIENT /* if0000.h */ -0x00000000 7 8#define NVIF_CLASS_CONTROL /* if0001.h */ -0x00000001 --- 202 unchanged lines hidden (view full) --- 211#define GT212_DMA 0x000085b5 212#define FERMI_DMA 0x000090b5 213#define KEPLER_DMA_COPY_A 0x0000a0b5 214#define MAXWELL_DMA_COPY_A 0x0000b0b5 215#define PASCAL_DMA_COPY_A 0x0000c0b5 216#define PASCAL_DMA_COPY_B 0x0000c1b5 217#define VOLTA_DMA_COPY_A 0x0000c3b5 218#define TURING_DMA_COPY_A 0x0000c5b5 | 1/* SPDX-License-Identifier: MIT */ 2#ifndef __NVIF_CLASS_H__ 3#define __NVIF_CLASS_H__ 4 5/* these class numbers are made up by us, and not nvidia-assigned */ 6#define NVIF_CLASS_CLIENT /* if0000.h */ -0x00000000 7 8#define NVIF_CLASS_CONTROL /* if0001.h */ -0x00000001 --- 202 unchanged lines hidden (view full) --- 211#define GT212_DMA 0x000085b5 212#define FERMI_DMA 0x000090b5 213#define KEPLER_DMA_COPY_A 0x0000a0b5 214#define MAXWELL_DMA_COPY_A 0x0000b0b5 215#define PASCAL_DMA_COPY_A 0x0000c0b5 216#define PASCAL_DMA_COPY_B 0x0000c1b5 217#define VOLTA_DMA_COPY_A 0x0000c3b5 218#define TURING_DMA_COPY_A 0x0000c5b5 |
| 219#define AMPERE_DMA_COPY_A 0x0000c6b5 |
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| 219#define AMPERE_DMA_COPY_B 0x0000c7b5 220 221#define FERMI_DECOMPRESS 0x000090b8 222 223#define NV50_COMPUTE 0x000050c0 224#define GT214_COMPUTE 0x000085c0 225#define FERMI_COMPUTE_A 0x000090c0 226#define FERMI_COMPUTE_B 0x000091c0 227#define KEPLER_COMPUTE_A 0x0000a0c0 228#define KEPLER_COMPUTE_B 0x0000a1c0 229#define MAXWELL_COMPUTE_A 0x0000b0c0 230#define MAXWELL_COMPUTE_B 0x0000b1c0 231#define PASCAL_COMPUTE_A 0x0000c0c0 232#define PASCAL_COMPUTE_B 0x0000c1c0 233#define VOLTA_COMPUTE_A 0x0000c3c0 234#define TURING_COMPUTE_A 0x0000c5c0 235 236#define NV74_CIPHER 0x000074c1 237#endif | 220#define AMPERE_DMA_COPY_B 0x0000c7b5 221 222#define FERMI_DECOMPRESS 0x000090b8 223 224#define NV50_COMPUTE 0x000050c0 225#define GT214_COMPUTE 0x000085c0 226#define FERMI_COMPUTE_A 0x000090c0 227#define FERMI_COMPUTE_B 0x000091c0 228#define KEPLER_COMPUTE_A 0x0000a0c0 229#define KEPLER_COMPUTE_B 0x0000a1c0 230#define MAXWELL_COMPUTE_A 0x0000b0c0 231#define MAXWELL_COMPUTE_B 0x0000b1c0 232#define PASCAL_COMPUTE_A 0x0000c0c0 233#define PASCAL_COMPUTE_B 0x0000c1c0 234#define VOLTA_COMPUTE_A 0x0000c3c0 235#define TURING_COMPUTE_A 0x0000c5c0 236 237#define NV74_CIPHER 0x000074c1 238#endif |