| ingenic-drm.h (bb85760572ca24a76c3de644ce45cfb69f5a731a) | ingenic-drm.h (dba09e834f4ee6121346f2a7d40b7ee96d0b4b77) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0 */ 2// 3// Ingenic JZ47xx KMS driver - Register definitions and private API 4// 5// Copyright (C) 2020, Paul Cercueil <paul@crapouillou.net> 6 7#ifndef DRIVERS_GPU_DRM_INGENIC_INGENIC_DRM_H 8#define DRIVERS_GPU_DRM_INGENIC_INGENIC_DRM_H --- 110 unchanged lines hidden (view full) --- 119#define JZ_LCD_CTRL_DISABLE BIT(4) 120#define JZ_LCD_CTRL_ENABLE BIT(3) 121#define JZ_LCD_CTRL_BPP_1 0x0 122#define JZ_LCD_CTRL_BPP_2 0x1 123#define JZ_LCD_CTRL_BPP_4 0x2 124#define JZ_LCD_CTRL_BPP_8 0x3 125#define JZ_LCD_CTRL_BPP_15_16 0x4 126#define JZ_LCD_CTRL_BPP_18_24 0x5 | 1/* SPDX-License-Identifier: GPL-2.0 */ 2// 3// Ingenic JZ47xx KMS driver - Register definitions and private API 4// 5// Copyright (C) 2020, Paul Cercueil <paul@crapouillou.net> 6 7#ifndef DRIVERS_GPU_DRM_INGENIC_INGENIC_DRM_H 8#define DRIVERS_GPU_DRM_INGENIC_INGENIC_DRM_H --- 110 unchanged lines hidden (view full) --- 119#define JZ_LCD_CTRL_DISABLE BIT(4) 120#define JZ_LCD_CTRL_ENABLE BIT(3) 121#define JZ_LCD_CTRL_BPP_1 0x0 122#define JZ_LCD_CTRL_BPP_2 0x1 123#define JZ_LCD_CTRL_BPP_4 0x2 124#define JZ_LCD_CTRL_BPP_8 0x3 125#define JZ_LCD_CTRL_BPP_15_16 0x4 126#define JZ_LCD_CTRL_BPP_18_24 0x5 |
| 127#define JZ_LCD_CTRL_BPP_24_COMP 0x6 |
|
| 127#define JZ_LCD_CTRL_BPP_30 0x7 128#define JZ_LCD_CTRL_BPP_MASK (JZ_LCD_CTRL_RGB555 | 0x7) 129 130#define JZ_LCD_CMD_SOF_IRQ BIT(31) 131#define JZ_LCD_CMD_EOF_IRQ BIT(30) 132#define JZ_LCD_CMD_ENABLE_PAL BIT(28) 133 134#define JZ_LCD_SYNC_MASK 0x3ff --- 6 unchanged lines hidden (view full) --- 141#define JZ_LCD_OSDC_F0EN BIT(3) 142#define JZ_LCD_OSDC_F1EN BIT(4) 143 144#define JZ_LCD_OSDCTRL_IPU BIT(15) 145#define JZ_LCD_OSDCTRL_RGB555 BIT(4) 146#define JZ_LCD_OSDCTRL_CHANGE BIT(3) 147#define JZ_LCD_OSDCTRL_BPP_15_16 0x4 148#define JZ_LCD_OSDCTRL_BPP_18_24 0x5 | 128#define JZ_LCD_CTRL_BPP_30 0x7 129#define JZ_LCD_CTRL_BPP_MASK (JZ_LCD_CTRL_RGB555 | 0x7) 130 131#define JZ_LCD_CMD_SOF_IRQ BIT(31) 132#define JZ_LCD_CMD_EOF_IRQ BIT(30) 133#define JZ_LCD_CMD_ENABLE_PAL BIT(28) 134 135#define JZ_LCD_SYNC_MASK 0x3ff --- 6 unchanged lines hidden (view full) --- 142#define JZ_LCD_OSDC_F0EN BIT(3) 143#define JZ_LCD_OSDC_F1EN BIT(4) 144 145#define JZ_LCD_OSDCTRL_IPU BIT(15) 146#define JZ_LCD_OSDCTRL_RGB555 BIT(4) 147#define JZ_LCD_OSDCTRL_CHANGE BIT(3) 148#define JZ_LCD_OSDCTRL_BPP_15_16 0x4 149#define JZ_LCD_OSDCTRL_BPP_18_24 0x5 |
| 150#define JZ_LCD_OSDCTRL_BPP_24_COMP 0x6 |
|
| 149#define JZ_LCD_OSDCTRL_BPP_30 0x7 150#define JZ_LCD_OSDCTRL_BPP_MASK (JZ_LCD_OSDCTRL_RGB555 | 0x7) 151 152#define JZ_LCD_OSDS_READY BIT(0) 153 154#define JZ_LCD_IPUR_IPUREN BIT(31) 155#define JZ_LCD_IPUR_IPUR_LSB 0 156 --- 22 unchanged lines hidden --- | 151#define JZ_LCD_OSDCTRL_BPP_30 0x7 152#define JZ_LCD_OSDCTRL_BPP_MASK (JZ_LCD_OSDCTRL_RGB555 | 0x7) 153 154#define JZ_LCD_OSDS_READY BIT(0) 155 156#define JZ_LCD_IPUR_IPUREN BIT(31) 157#define JZ_LCD_IPUR_IPUR_LSB 0 158 --- 22 unchanged lines hidden --- |