Kconfig (1e88eb1b2c259994d034b0833cb489105a984ebb) Kconfig (4652ae7a51b78d7607c247228ac2a14fa0088bbf)
1# SPDX-License-Identifier: MIT
2menu "Display Engine Configuration"
3 depends on DRM && DRM_AMDGPU
4
5config DRM_AMD_DC
6 bool "AMD DC - Enable new display engine"
7 default y
8 depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64
9 select SND_HDA_COMPONENT if SND_HDA_CORE
10 # !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
1# SPDX-License-Identifier: MIT
2menu "Display Engine Configuration"
3 depends on DRM && DRM_AMDGPU
4
5config DRM_AMD_DC
6 bool "AMD DC - Enable new display engine"
7 default y
8 depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64
9 select SND_HDA_COMPONENT if SND_HDA_CORE
10 # !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
11 select DRM_AMD_DC_DCN if (X86 || PPC_LONG_DOUBLE_128 || (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG))
11 select DRM_AMD_DC_FP if (X86 || PPC64 || (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG))
12 help
13 Choose this option if you want to use the new display engine
14 support for AMDGPU. This adds required support for Vega and
15 Raven ASICs.
16
17 calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64)
18 architectures built with Clang (all released versions), whereby the stack
19 frame gets blown up to well over 5k. This would cause an immediate kernel
20 panic on most architectures. We'll revert this when the following bug report
21 has been resolved: https://github.com/llvm/llvm-project/issues/41896.
22
12 help
13 Choose this option if you want to use the new display engine
14 support for AMDGPU. This adds required support for Vega and
15 Raven ASICs.
16
17 calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64)
18 architectures built with Clang (all released versions), whereby the stack
19 frame gets blown up to well over 5k. This would cause an immediate kernel
20 panic on most architectures. We'll revert this when the following bug report
21 has been resolved: https://github.com/llvm/llvm-project/issues/41896.
22
23config DRM_AMD_DC_DCN
23config DRM_AMD_DC_FP
24 def_bool n
25 help
24 def_bool n
25 help
26 Raven, Navi, and newer family support for display engine
26 Floating point support, required for DCN-based SoCs
27
28config DRM_AMD_DC_SI
29 bool "AMD DC support for Southern Islands ASICs"
30 depends on DRM_AMDGPU_SI
31 depends on DRM_AMD_DC
32 help
33 Choose this option to enable new AMD DC support for SI asics
34 by default. This includes Tahiti, Pitcairn, Cape Verde, Oland.

--- 4 unchanged lines hidden (view full) ---

39 depends on DRM_AMD_DC
40 depends on KGDB
41 help
42 Choose this option if you want to hit kdgb_break in assert.
43
44config DRM_AMD_SECURE_DISPLAY
45 bool "Enable secure display support"
46 depends on DEBUG_FS
27
28config DRM_AMD_DC_SI
29 bool "AMD DC support for Southern Islands ASICs"
30 depends on DRM_AMDGPU_SI
31 depends on DRM_AMD_DC
32 help
33 Choose this option to enable new AMD DC support for SI asics
34 by default. This includes Tahiti, Pitcairn, Cape Verde, Oland.

--- 4 unchanged lines hidden (view full) ---

39 depends on DRM_AMD_DC
40 depends on KGDB
41 help
42 Choose this option if you want to hit kdgb_break in assert.
43
44config DRM_AMD_SECURE_DISPLAY
45 bool "Enable secure display support"
46 depends on DEBUG_FS
47 depends on DRM_AMD_DC_DCN
47 depends on DRM_AMD_DC_FP
48 help
49 Choose this option if you want to
50 support secure display
51
52 This option enables the calculation
53 of crc of specific region via debugfs.
54 Cooperate with specific DMCU FW.
55
56
57endmenu
48 help
49 Choose this option if you want to
50 support secure display
51
52 This option enables the calculation
53 of crc of specific region via debugfs.
54 Cooperate with specific DMCU FW.
55
56
57endmenu