gpio-xlp.c (245f0db0de926601353776085e6f6a4c974c5615) gpio-xlp.c (dd98756d78153dbb43685f0f0e618dda235aee00)
1/*
2 * Copyright (C) 2003-2015 Broadcom Corporation
3 * All Rights Reserved
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *

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80#define XLP_MAX_NR_GPIO 96
81
82/* XLP variants supported by this driver */
83enum {
84 XLP_GPIO_VARIANT_XLP832 = 1,
85 XLP_GPIO_VARIANT_XLP316,
86 XLP_GPIO_VARIANT_XLP208,
87 XLP_GPIO_VARIANT_XLP980,
1/*
2 * Copyright (C) 2003-2015 Broadcom Corporation
3 * All Rights Reserved
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *

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80#define XLP_MAX_NR_GPIO 96
81
82/* XLP variants supported by this driver */
83enum {
84 XLP_GPIO_VARIANT_XLP832 = 1,
85 XLP_GPIO_VARIANT_XLP316,
86 XLP_GPIO_VARIANT_XLP208,
87 XLP_GPIO_VARIANT_XLP980,
88 XLP_GPIO_VARIANT_XLP532
88 XLP_GPIO_VARIANT_XLP532,
89 GPIO_VARIANT_VULCAN
89};
90
91struct xlp_gpio_priv {
92 struct gpio_chip chip;
93 DECLARE_BITMAP(gpio_enabled_mask, XLP_MAX_NR_GPIO);
94 void __iomem *gpio_intr_en; /* pointer to first intr enable reg */
95 void __iomem *gpio_intr_stat; /* pointer to first intr status reg */
96 void __iomem *gpio_intr_type; /* pointer to first intr type reg */

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280 {
281 .compatible = "netlogic,xlp980-gpio",
282 .data = (void *)XLP_GPIO_VARIANT_XLP980,
283 },
284 {
285 .compatible = "netlogic,xlp532-gpio",
286 .data = (void *)XLP_GPIO_VARIANT_XLP532,
287 },
90};
91
92struct xlp_gpio_priv {
93 struct gpio_chip chip;
94 DECLARE_BITMAP(gpio_enabled_mask, XLP_MAX_NR_GPIO);
95 void __iomem *gpio_intr_en; /* pointer to first intr enable reg */
96 void __iomem *gpio_intr_stat; /* pointer to first intr status reg */
97 void __iomem *gpio_intr_type; /* pointer to first intr type reg */

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281 {
282 .compatible = "netlogic,xlp980-gpio",
283 .data = (void *)XLP_GPIO_VARIANT_XLP980,
284 },
285 {
286 .compatible = "netlogic,xlp532-gpio",
287 .data = (void *)XLP_GPIO_VARIANT_XLP532,
288 },
289 {
290 .compatible = "brcm,vulcan-gpio",
291 .data = (void *)GPIO_VARIANT_VULCAN,
292 },
288 { /* sentinel */ },
289};
290MODULE_DEVICE_TABLE(of, xlp_gpio_of_ids);
291
292static int xlp_gpio_probe(struct platform_device *pdev)
293{
294 struct gpio_chip *gc;
295 struct resource *iores;

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342 priv->gpio_intr_type = gpio_base + GPIO_3XX_INT_TYPE;
343 priv->gpio_intr_pol = gpio_base + GPIO_3XX_INT_POL;
344 priv->gpio_intr_en = gpio_base + GPIO_3XX_INT_EN00;
345
346 ngpio = (soc_type == XLP_GPIO_VARIANT_XLP208) ? 42 : 57;
347 break;
348 case XLP_GPIO_VARIANT_XLP980:
349 case XLP_GPIO_VARIANT_XLP532:
293 { /* sentinel */ },
294};
295MODULE_DEVICE_TABLE(of, xlp_gpio_of_ids);
296
297static int xlp_gpio_probe(struct platform_device *pdev)
298{
299 struct gpio_chip *gc;
300 struct resource *iores;

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347 priv->gpio_intr_type = gpio_base + GPIO_3XX_INT_TYPE;
348 priv->gpio_intr_pol = gpio_base + GPIO_3XX_INT_POL;
349 priv->gpio_intr_en = gpio_base + GPIO_3XX_INT_EN00;
350
351 ngpio = (soc_type == XLP_GPIO_VARIANT_XLP208) ? 42 : 57;
352 break;
353 case XLP_GPIO_VARIANT_XLP980:
354 case XLP_GPIO_VARIANT_XLP532:
355 case GPIO_VARIANT_VULCAN:
350 priv->gpio_out_en = gpio_base + GPIO_9XX_OUTPUT_EN;
351 priv->gpio_paddrv = gpio_base + GPIO_9XX_PADDRV;
352 priv->gpio_intr_stat = gpio_base + GPIO_9XX_INT_STAT;
353 priv->gpio_intr_type = gpio_base + GPIO_9XX_INT_TYPE;
354 priv->gpio_intr_pol = gpio_base + GPIO_9XX_INT_POL;
355 priv->gpio_intr_en = gpio_base + GPIO_9XX_INT_EN00;
356
356 priv->gpio_out_en = gpio_base + GPIO_9XX_OUTPUT_EN;
357 priv->gpio_paddrv = gpio_base + GPIO_9XX_PADDRV;
358 priv->gpio_intr_stat = gpio_base + GPIO_9XX_INT_STAT;
359 priv->gpio_intr_type = gpio_base + GPIO_9XX_INT_TYPE;
360 priv->gpio_intr_pol = gpio_base + GPIO_9XX_INT_POL;
361 priv->gpio_intr_en = gpio_base + GPIO_9XX_INT_EN00;
362
357 ngpio = (soc_type == XLP_GPIO_VARIANT_XLP980) ? 66 : 67;
363 if (soc_type == XLP_GPIO_VARIANT_XLP980)
364 ngpio = 66;
365 else if (soc_type == XLP_GPIO_VARIANT_XLP532)
366 ngpio = 67;
367 else
368 ngpio = 70;
358 break;
359 default:
360 dev_err(&pdev->dev, "Unknown Processor type!\n");
361 return -ENODEV;
362 }
363
364 bitmap_zero(priv->gpio_enabled_mask, XLP_MAX_NR_GPIO);
365

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372 gc->ngpio = ngpio;
373 gc->of_node = pdev->dev.of_node;
374 gc->direction_output = xlp_gpio_dir_output;
375 gc->direction_input = xlp_gpio_dir_input;
376 gc->set = xlp_gpio_set;
377 gc->get = xlp_gpio_get;
378
379 spin_lock_init(&priv->lock);
369 break;
370 default:
371 dev_err(&pdev->dev, "Unknown Processor type!\n");
372 return -ENODEV;
373 }
374
375 bitmap_zero(priv->gpio_enabled_mask, XLP_MAX_NR_GPIO);
376

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383 gc->ngpio = ngpio;
384 gc->of_node = pdev->dev.of_node;
385 gc->direction_output = xlp_gpio_dir_output;
386 gc->direction_input = xlp_gpio_dir_input;
387 gc->set = xlp_gpio_set;
388 gc->get = xlp_gpio_get;
389
390 spin_lock_init(&priv->lock);
380 irq_base = irq_alloc_descs(-1, XLP_GPIO_IRQ_BASE, gc->ngpio, 0);
381 if (irq_base < 0) {
391 /* XLP has fixed IRQ range for GPIO interrupts */
392 if (soc_type == GPIO_VARIANT_VULCAN)
393 irq_base = irq_alloc_descs(-1, 0, gc->ngpio, 0);
394 else
395 irq_base = irq_alloc_descs(-1, XLP_GPIO_IRQ_BASE, gc->ngpio, 0);
396 if (IS_ERR_VALUE(irq_base)) {
382 dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n");
397 dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n");
383 return -ENODEV;
398 return irq_base;
384 }
385
386 err = gpiochip_add_data(gc, priv);
387 if (err < 0)
388 goto out_free_desc;
389
390 err = gpiochip_irqchip_add(gc, &xlp_gpio_irq_chip, irq_base,
391 handle_level_irq, IRQ_TYPE_NONE);

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400
401 err = gpiochip_add_data(gc, priv);
402 if (err < 0)
403 goto out_free_desc;
404
405 err = gpiochip_irqchip_add(gc, &xlp_gpio_irq_chip, irq_base,
406 handle_level_irq, IRQ_TYPE_NONE);

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