gpio-reg.c (380639c7cc786ec663e43eb3896ccf9172a46900) gpio-reg.c (0e3cb6ee386f384a9131f0c7db52a0a961d2ded9)
1/*
2 * gpio-reg: single register individually fixed-direction GPIOs
3 *
4 * Copyright (C) 2016 Russell King
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.

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14#include <linux/spinlock.h>
15
16struct gpio_reg {
17 struct gpio_chip gc;
18 spinlock_t lock;
19 u32 direction;
20 u32 out;
21 void __iomem *reg;
1/*
2 * gpio-reg: single register individually fixed-direction GPIOs
3 *
4 * Copyright (C) 2016 Russell King
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.

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14#include <linux/spinlock.h>
15
16struct gpio_reg {
17 struct gpio_chip gc;
18 spinlock_t lock;
19 u32 direction;
20 u32 out;
21 void __iomem *reg;
22 struct irq_domain *irqdomain;
23 const int *irqs;
22};
23
24#define to_gpio_reg(x) container_of(x, struct gpio_reg, gc)
25
26static int gpio_reg_get_direction(struct gpio_chip *gc, unsigned offset)
27{
28 struct gpio_reg *r = to_gpio_reg(gc);
29

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91 unsigned long flags;
92
93 spin_lock_irqsave(&r->lock, flags);
94 r->out = (r->out & ~*mask) | (*bits & *mask);
95 writel_relaxed(r->out, r->reg);
96 spin_unlock_irqrestore(&r->lock, flags);
97}
98
24};
25
26#define to_gpio_reg(x) container_of(x, struct gpio_reg, gc)
27
28static int gpio_reg_get_direction(struct gpio_chip *gc, unsigned offset)
29{
30 struct gpio_reg *r = to_gpio_reg(gc);
31

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93 unsigned long flags;
94
95 spin_lock_irqsave(&r->lock, flags);
96 r->out = (r->out & ~*mask) | (*bits & *mask);
97 writel_relaxed(r->out, r->reg);
98 spin_unlock_irqrestore(&r->lock, flags);
99}
100
101static int gpio_reg_to_irq(struct gpio_chip *gc, unsigned offset)
102{
103 struct gpio_reg *r = to_gpio_reg(gc);
104 int irq = r->irqs[offset];
105
106 if (irq >= 0 && r->irqdomain)
107 irq = irq_find_mapping(r->irqdomain, irq);
108
109 return irq;
110}
111
99/**
100 * gpio_reg_init - add a fixed in/out register as gpio
101 * @dev: optional struct device associated with this register
102 * @base: start gpio number, or -1 to allocate
103 * @num: number of GPIOs, maximum 32
104 * @label: GPIO chip label
105 * @direction: bitmask of fixed direction, one per GPIO signal, 1 = in
106 * @def_out: initial GPIO output value
112/**
113 * gpio_reg_init - add a fixed in/out register as gpio
114 * @dev: optional struct device associated with this register
115 * @base: start gpio number, or -1 to allocate
116 * @num: number of GPIOs, maximum 32
117 * @label: GPIO chip label
118 * @direction: bitmask of fixed direction, one per GPIO signal, 1 = in
119 * @def_out: initial GPIO output value
107 * @names: array of %num strings describing each GPIO signal
120 * @names: array of %num strings describing each GPIO signal or %NULL
121 * @irqdom: irq domain or %NULL
122 * @irqs: array of %num ints describing the interrupt mapping for each
123 * GPIO signal, or %NULL. If @irqdom is %NULL, then this
124 * describes the Linux interrupt number, otherwise it describes
125 * the hardware interrupt number in the specified irq domain.
108 *
109 * Add a single-register GPIO device containing up to 32 GPIO signals,
110 * where each GPIO has a fixed input or output configuration. Only
111 * input GPIOs are assumed to be readable from the register, and only
112 * then after a double-read. Output values are assumed not to be
113 * readable.
114 */
115struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg,
116 int base, int num, const char *label, u32 direction, u32 def_out,
126 *
127 * Add a single-register GPIO device containing up to 32 GPIO signals,
128 * where each GPIO has a fixed input or output configuration. Only
129 * input GPIOs are assumed to be readable from the register, and only
130 * then after a double-read. Output values are assumed not to be
131 * readable.
132 */
133struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg,
134 int base, int num, const char *label, u32 direction, u32 def_out,
117 const char *const *names)
135 const char *const *names, struct irq_domain *irqdom, const int *irqs)
118{
119 struct gpio_reg *r;
120 int ret;
121
122 if (dev)
123 r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);
124 else
125 r = kzalloc(sizeof(*r), GFP_KERNEL);

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131
132 r->gc.label = label;
133 r->gc.get_direction = gpio_reg_get_direction;
134 r->gc.direction_input = gpio_reg_direction_input;
135 r->gc.direction_output = gpio_reg_direction_output;
136 r->gc.set = gpio_reg_set;
137 r->gc.get = gpio_reg_get;
138 r->gc.set_multiple = gpio_reg_set_multiple;
136{
137 struct gpio_reg *r;
138 int ret;
139
140 if (dev)
141 r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);
142 else
143 r = kzalloc(sizeof(*r), GFP_KERNEL);

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149
150 r->gc.label = label;
151 r->gc.get_direction = gpio_reg_get_direction;
152 r->gc.direction_input = gpio_reg_direction_input;
153 r->gc.direction_output = gpio_reg_direction_output;
154 r->gc.set = gpio_reg_set;
155 r->gc.get = gpio_reg_get;
156 r->gc.set_multiple = gpio_reg_set_multiple;
157 if (irqs)
158 r->gc.to_irq = gpio_reg_to_irq;
139 r->gc.base = base;
140 r->gc.ngpio = num;
141 r->gc.names = names;
142 r->direction = direction;
143 r->out = def_out;
144 r->reg = reg;
159 r->gc.base = base;
160 r->gc.ngpio = num;
161 r->gc.names = names;
162 r->direction = direction;
163 r->out = def_out;
164 r->reg = reg;
165 r->irqs = irqs;
145
146 if (dev)
147 ret = devm_gpiochip_add_data(dev, &r->gc, r);
148 else
149 ret = gpiochip_add_data(&r->gc, r);
150
151 return ret ? ERR_PTR(ret) : &r->gc;
152}

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167 if (dev)
168 ret = devm_gpiochip_add_data(dev, &r->gc, r);
169 else
170 ret = gpiochip_add_data(&r->gc, r);
171
172 return ret ? ERR_PTR(ret) : &r->gc;
173}

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