gpio-merrifield.c (cd242b333b0059fab46063f7f9cf8fd0d196d1c9) gpio-merrifield.c (4a5e0f9e73511595c68f907a15772e5d1ba4aac6)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Intel Merrifield SoC GPIO driver
4 *
5 * Copyright (c) 2016 Intel Corporation.
6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 */
8

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360 irq = irq_find_mapping(gc->irq.domain, base + gpio);
361 generic_handle_irq(irq);
362 }
363 }
364
365 chained_irq_exit(irqchip, desc);
366}
367
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Intel Merrifield SoC GPIO driver
4 *
5 * Copyright (c) 2016 Intel Corporation.
6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 */
8

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360 irq = irq_find_mapping(gc->irq.domain, base + gpio);
361 generic_handle_irq(irq);
362 }
363 }
364
365 chained_irq_exit(irqchip, desc);
366}
367
368static void mrfld_irq_init_hw(struct mrfld_gpio *priv)
368static int mrfld_irq_init_hw(struct gpio_chip *chip)
369{
369{
370 struct mrfld_gpio *priv = gpiochip_get_data(chip);
370 void __iomem *reg;
371 unsigned int base;
372
373 for (base = 0; base < priv->chip.ngpio; base += 32) {
374 /* Clear the rising-edge detect register */
375 reg = gpio_reg(&priv->chip, base, GRER);
376 writel(0, reg);
377 /* Clear the falling-edge detect register */
378 reg = gpio_reg(&priv->chip, base, GFER);
379 writel(0, reg);
380 }
371 void __iomem *reg;
372 unsigned int base;
373
374 for (base = 0; base < priv->chip.ngpio; base += 32) {
375 /* Clear the rising-edge detect register */
376 reg = gpio_reg(&priv->chip, base, GRER);
377 writel(0, reg);
378 /* Clear the falling-edge detect register */
379 reg = gpio_reg(&priv->chip, base, GFER);
380 writel(0, reg);
381 }
382
383 return 0;
381}
382
383static const char *mrfld_gpio_get_pinctrl_dev_name(struct mrfld_gpio *priv)
384{
385 struct acpi_device *adev;
386 const char *name;
387
388 adev = acpi_dev_get_first_match_dev("INTC1002", NULL, -1);

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417 }
418 }
419
420 return 0;
421}
422
423static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id)
424{
384}
385
386static const char *mrfld_gpio_get_pinctrl_dev_name(struct mrfld_gpio *priv)
387{
388 struct acpi_device *adev;
389 const char *name;
390
391 adev = acpi_dev_get_first_match_dev("INTC1002", NULL, -1);

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420 }
421 }
422
423 return 0;
424}
425
426static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id)
427{
428 struct gpio_irq_chip *girq;
425 struct mrfld_gpio *priv;
426 u32 gpio_base, irq_base;
427 void __iomem *base;
428 int retval;
429
430 retval = pcim_enable_device(pdev);
431 if (retval)
432 return retval;

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464 priv->chip.set_config = mrfld_gpio_set_config;
465 priv->chip.base = gpio_base;
466 priv->chip.ngpio = MRFLD_NGPIO;
467 priv->chip.can_sleep = false;
468 priv->chip.add_pin_ranges = mrfld_gpio_add_pin_ranges;
469
470 raw_spin_lock_init(&priv->lock);
471
429 struct mrfld_gpio *priv;
430 u32 gpio_base, irq_base;
431 void __iomem *base;
432 int retval;
433
434 retval = pcim_enable_device(pdev);
435 if (retval)
436 return retval;

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468 priv->chip.set_config = mrfld_gpio_set_config;
469 priv->chip.base = gpio_base;
470 priv->chip.ngpio = MRFLD_NGPIO;
471 priv->chip.can_sleep = false;
472 priv->chip.add_pin_ranges = mrfld_gpio_add_pin_ranges;
473
474 raw_spin_lock_init(&priv->lock);
475
476 girq = &priv->chip.irq;
477 girq->chip = &mrfld_irqchip;
478 girq->init_hw = mrfld_irq_init_hw;
479 girq->parent_handler = mrfld_irq_handler;
480 girq->num_parents = 1;
481 girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents,
482 sizeof(*girq->parents), GFP_KERNEL);
483 if (!girq->parents)
484 return -ENOMEM;
485 girq->parents[0] = pdev->irq;
486 girq->first = irq_base;
487 girq->default_type = IRQ_TYPE_NONE;
488 girq->handler = handle_bad_irq;
489
472 retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv);
473 if (retval) {
474 dev_err(&pdev->dev, "gpiochip_add error %d\n", retval);
475 return retval;
476 }
477
490 retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv);
491 if (retval) {
492 dev_err(&pdev->dev, "gpiochip_add error %d\n", retval);
493 return retval;
494 }
495
478 retval = gpiochip_irqchip_add(&priv->chip, &mrfld_irqchip, irq_base,
479 handle_bad_irq, IRQ_TYPE_NONE);
480 if (retval) {
481 dev_err(&pdev->dev, "could not connect irqchip to gpiochip\n");
482 return retval;
483 }
484
485 mrfld_irq_init_hw(priv);
486
487 gpiochip_set_chained_irqchip(&priv->chip, &mrfld_irqchip, pdev->irq,
488 mrfld_irq_handler);
489
490 pci_set_drvdata(pdev, priv);
491 return 0;
492}
493
494static const struct pci_device_id mrfld_gpio_ids[] = {
495 { PCI_VDEVICE(INTEL, 0x1199) },
496 { }
497};

--- 13 unchanged lines hidden --- 		496 pci_set_drvdata(pdev, priv);
497 return 0;
498}
499
500static const struct pci_device_id mrfld_gpio_ids[] = {
501 { PCI_VDEVICE(INTEL, 0x1199) },
502 { }
503};

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