gpio-i8255.h (4f2c0a4acffbec01079c28f839422e64ddeff004) gpio-i8255.h (0b7c490d7de3255ad1db82000b42f3f021f6dbf0)
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright 2022 William Breathitt Gray */
3#ifndef _I8255_H_
4#define _I8255_H_
5
6#include <linux/spinlock.h>
7#include <linux/types.h>
8

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21 * @lock: synchronization lock for accessing device state
22 * @control_state: Control register state
23 */
24struct i8255_state {
25 spinlock_t lock;
26 u8 control_state;
27};
28
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright 2022 William Breathitt Gray */
3#ifndef _I8255_H_
4#define _I8255_H_
5
6#include <linux/spinlock.h>
7#include <linux/types.h>
8

--- 12 unchanged lines hidden (view full) ---

21 * @lock: synchronization lock for accessing device state
22 * @control_state: Control register state
23 */
24struct i8255_state {
25 spinlock_t lock;
26 u8 control_state;
27};
28
29struct device;
30struct irq_domain;
31struct regmap;
32
33#define i8255_volatile_regmap_range(_base) regmap_reg_range(_base, _base + 0x2)
34
35/**
36 * struct i8255_regmap_config - Configuration for the register map of an i8255
37 * @parent: parent device
38 * @map: regmap for the i8255
39 * @num_ppi: number of i8255 Programmable Peripheral Interface
40 * @names: (optional) array of names for gpios
41 * @domain: (optional) IRQ domain if the controller is interrupt-capable
42 *
43 * Note: The regmap is expected to have cache enabled and i8255 control
44 * registers not marked as volatile.
45 */
46struct i8255_regmap_config {
47 struct device *parent;
48 struct regmap *map;
49 int num_ppi;
50 const char *const *names;
51 struct irq_domain *domain;
52};
53
54int devm_i8255_regmap_register(struct device *dev,
55 const struct i8255_regmap_config *config);
56
29void i8255_direction_input(struct i8255 __iomem *ppi, struct i8255_state *state,
30 unsigned long offset);
31void i8255_direction_output(struct i8255 __iomem *ppi,
32 struct i8255_state *state, unsigned long offset,
33 unsigned long value);
34int i8255_get(struct i8255 __iomem *ppi, unsigned long offset);
35int i8255_get_direction(const struct i8255_state *state, unsigned long offset);
36void i8255_get_multiple(struct i8255 __iomem *ppi, const unsigned long *mask,
37 unsigned long *bits, unsigned long ngpio);
38void i8255_mode0_output(struct i8255 __iomem *const ppi);
39void i8255_set(struct i8255 __iomem *ppi, struct i8255_state *state,
40 unsigned long offset, unsigned long value);
41void i8255_set_multiple(struct i8255 __iomem *ppi, struct i8255_state *state,
42 const unsigned long *mask, const unsigned long *bits,
43 unsigned long ngpio);
44void i8255_state_init(struct i8255_state *const state, unsigned long nbanks);
45
46#endif /* _I8255_H_ */
57void i8255_direction_input(struct i8255 __iomem *ppi, struct i8255_state *state,
58 unsigned long offset);
59void i8255_direction_output(struct i8255 __iomem *ppi,
60 struct i8255_state *state, unsigned long offset,
61 unsigned long value);
62int i8255_get(struct i8255 __iomem *ppi, unsigned long offset);
63int i8255_get_direction(const struct i8255_state *state, unsigned long offset);
64void i8255_get_multiple(struct i8255 __iomem *ppi, const unsigned long *mask,
65 unsigned long *bits, unsigned long ngpio);
66void i8255_mode0_output(struct i8255 __iomem *const ppi);
67void i8255_set(struct i8255 __iomem *ppi, struct i8255_state *state,
68 unsigned long offset, unsigned long value);
69void i8255_set_multiple(struct i8255 __iomem *ppi, struct i8255_state *state,
70 const unsigned long *mask, const unsigned long *bits,
71 unsigned long ngpio);
72void i8255_state_init(struct i8255_state *const state, unsigned long nbanks);
73
74#endif /* _I8255_H_ */