gpio-f7188x.c (7e3b1207705c10ada363bbc7d0235730ce1f5b79) gpio-f7188x.c (1920906f59652b9ac45dff69d56044a98b11233b)
1/*
1/*
2 * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882 and F71889
2 * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
3 *
4 * Copyright (C) 2010-2013 LaCie
5 *
6 * Author: Simon Guinot <simon.guinot@sequanux.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or

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31#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
32#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
33
34#define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
35#define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
36#define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
37#define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
38#define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
3 *
4 * Copyright (C) 2010-2013 LaCie
5 *
6 * Author: Simon Guinot <simon.guinot@sequanux.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or

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31#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
32#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
33
34#define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
35#define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
36#define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
37#define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
38#define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
39#define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
39
40
40enum chips { f71869, f71869a, f71882fg, f71889f };
41enum chips { f71869, f71869a, f71882fg, f71889f, f81866 };
41
42static const char * const f7188x_names[] = {
43 "f71869",
44 "f71869a",
45 "f71882fg",
46 "f71889f",
42
43static const char * const f7188x_names[] = {
44 "f71869",
45 "f71869a",
46 "f71882fg",
47 "f71889f",
48 "f81866",
47};
48
49struct f7188x_sio {
50 int addr;
51 enum chips type;
52};
53
54struct f7188x_gpio_bank {

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185 F7188X_GPIO_BANK(20, 8, 0xD0),
186 F7188X_GPIO_BANK(30, 8, 0xC0),
187 F7188X_GPIO_BANK(40, 8, 0xB0),
188 F7188X_GPIO_BANK(50, 5, 0xA0),
189 F7188X_GPIO_BANK(60, 8, 0x90),
190 F7188X_GPIO_BANK(70, 8, 0x80),
191};
192
49};
50
51struct f7188x_sio {
52 int addr;
53 enum chips type;
54};
55
56struct f7188x_gpio_bank {

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187 F7188X_GPIO_BANK(20, 8, 0xD0),
188 F7188X_GPIO_BANK(30, 8, 0xC0),
189 F7188X_GPIO_BANK(40, 8, 0xB0),
190 F7188X_GPIO_BANK(50, 5, 0xA0),
191 F7188X_GPIO_BANK(60, 8, 0x90),
192 F7188X_GPIO_BANK(70, 8, 0x80),
193};
194
195static struct f7188x_gpio_bank f81866_gpio_bank[] = {
196 F7188X_GPIO_BANK(0, 8, 0xF0),
197 F7188X_GPIO_BANK(10, 8, 0xE0),
198 F7188X_GPIO_BANK(20, 8, 0xD0),
199 F7188X_GPIO_BANK(30, 8, 0xC0),
200 F7188X_GPIO_BANK(40, 8, 0xB0),
201 F7188X_GPIO_BANK(50, 8, 0xA0),
202 F7188X_GPIO_BANK(60, 8, 0x90),
203 F7188X_GPIO_BANK(70, 8, 0x80),
204 F7188X_GPIO_BANK(80, 8, 0x88),
205};
206
193static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
194{
195 int err;
196 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
197 struct f7188x_sio *sio = bank->data->sio;
198 u8 dir;
199
200 err = superio_enter(sio->addr);

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313 case f71882fg:
314 data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
315 data->bank = f71882_gpio_bank;
316 break;
317 case f71889f:
318 data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
319 data->bank = f71889_gpio_bank;
320 break;
207static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
208{
209 int err;
210 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
211 struct f7188x_sio *sio = bank->data->sio;
212 u8 dir;
213
214 err = superio_enter(sio->addr);

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327 case f71882fg:
328 data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
329 data->bank = f71882_gpio_bank;
330 break;
331 case f71889f:
332 data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
333 data->bank = f71889_gpio_bank;
334 break;
335 case f81866:
336 data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
337 data->bank = f81866_gpio_bank;
338 break;
321 default:
322 return -ENODEV;
323 }
324 data->sio = sio;
325
326 platform_set_drvdata(pdev, data);
327
328 /* For each GPIO bank, register a GPIO chip. */

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390 sio->type = f71869a;
391 break;
392 case SIO_F71882_ID:
393 sio->type = f71882fg;
394 break;
395 case SIO_F71889_ID:
396 sio->type = f71889f;
397 break;
339 default:
340 return -ENODEV;
341 }
342 data->sio = sio;
343
344 platform_set_drvdata(pdev, data);
345
346 /* For each GPIO bank, register a GPIO chip. */

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408 sio->type = f71869a;
409 break;
410 case SIO_F71882_ID:
411 sio->type = f71882fg;
412 break;
413 case SIO_F71889_ID:
414 sio->type = f71889f;
415 break;
416 case SIO_F81866_ID:
417 sio->type = f81866;
418 break;
398 default:
399 pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
400 goto err;
401 }
402 sio->addr = addr;
403 err = 0;
404
405 pr_info(DRVNAME ": Found %s at %#x, revision %d\n",

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480
481static void __exit f7188x_gpio_exit(void)
482{
483 platform_device_unregister(f7188x_gpio_pdev);
484 platform_driver_unregister(&f7188x_gpio_driver);
485}
486module_exit(f7188x_gpio_exit);
487
419 default:
420 pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
421 goto err;
422 }
423 sio->addr = addr;
424 err = 0;
425
426 pr_info(DRVNAME ": Found %s at %#x, revision %d\n",

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501
502static void __exit f7188x_gpio_exit(void)
503{
504 platform_device_unregister(f7188x_gpio_pdev);
505 platform_driver_unregister(&f7188x_gpio_driver);
506}
507module_exit(f7188x_gpio_exit);
508
488MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG and F71889F");
509MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889F and F81866");
489MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
490MODULE_LICENSE("GPL");
510MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
511MODULE_LICENSE("GPL");