ohci.h (498495dba268b20e8eadd7fe93c140c68b6cc9d2) ohci.h (7a14f78d70dd9fde77275a3cc9427de862969c4c)
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _FIREWIRE_OHCI_H
3#define _FIREWIRE_OHCI_H
4
5/* OHCI register map */
6
7#define OHCI1394_Version 0x000
8#define OHCI1394_GUID_ROM 0x004

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151#define OHCI1394_evt_tcode_err 0xb
152#define OHCI1394_evt_reserved_b 0xc
153#define OHCI1394_evt_reserved_c 0xd
154#define OHCI1394_evt_unknown 0xe
155#define OHCI1394_evt_flushed 0xf
156
157#define OHCI1394_phy_tcode 0xe
158
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _FIREWIRE_OHCI_H
3#define _FIREWIRE_OHCI_H
4
5/* OHCI register map */
6
7#define OHCI1394_Version 0x000
8#define OHCI1394_GUID_ROM 0x004

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151#define OHCI1394_evt_tcode_err 0xb
152#define OHCI1394_evt_reserved_b 0xc
153#define OHCI1394_evt_reserved_c 0xd
154#define OHCI1394_evt_unknown 0xe
155#define OHCI1394_evt_flushed 0xf
156
157#define OHCI1394_phy_tcode 0xe
158
159// Self-ID DMA.
160
161#define OHCI1394_SelfIDCount_selfIDError_MASK 0x80000000
162#define OHCI1394_SelfIDCount_selfIDError_SHIFT 31
163#define OHCI1394_SelfIDCount_selfIDGeneration_MASK 0x00ff0000
164#define OHCI1394_SelfIDCount_selfIDGeneration_SHIFT 16
165#define OHCI1394_SelfIDCount_selfIDSize_MASK 0x000007fc
166#define OHCI1394_SelfIDCount_selfIDSize_SHIFT 2
167
168static inline bool ohci1394_self_id_count_is_error(u32 value)
169{
170 return !!((value & OHCI1394_SelfIDCount_selfIDError_MASK) >> OHCI1394_SelfIDCount_selfIDError_SHIFT);
171}
172
173static inline u8 ohci1394_self_id_count_get_generation(u32 value)
174{
175 return (value & OHCI1394_SelfIDCount_selfIDGeneration_MASK) >> OHCI1394_SelfIDCount_selfIDGeneration_SHIFT;
176}
177
178// In 1394 OHCI specification, the maximum size of self ID stream is 504 quadlets
179// (= 63 devices * 4 self ID packets * 2 quadlets). The selfIDSize field accommodates it and its
180// additional first quadlet, since the field is 9 bits (0x1ff = 511).
181static inline u32 ohci1394_self_id_count_get_size(u32 value)
182{
183 return (value & OHCI1394_SelfIDCount_selfIDSize_MASK) >> OHCI1394_SelfIDCount_selfIDSize_SHIFT;
184}
185
186#define OHCI1394_SELF_ID_RECEIVE_Q0_GENERATION_MASK 0x00ff0000
187#define OHCI1394_SELF_ID_RECEIVE_Q0_GENERATION_SHIFT 16
188#define OHCI1394_SELF_ID_RECEIVE_Q0_TIMESTAMP_MASK 0x0000ffff
189#define OHCI1394_SELF_ID_RECEIVE_Q0_TIMESTAMP_SHIFT 0
190
191static inline u8 ohci1394_self_id_receive_q0_get_generation(u32 quadlet0)
192{
193 return (quadlet0 & OHCI1394_SELF_ID_RECEIVE_Q0_GENERATION_MASK) >> OHCI1394_SELF_ID_RECEIVE_Q0_GENERATION_SHIFT;
194}
195
196static inline u16 ohci1394_self_id_receive_q0_get_timestamp(u32 quadlet0)
197{
198 return (quadlet0 & OHCI1394_SELF_ID_RECEIVE_Q0_TIMESTAMP_MASK) >> OHCI1394_SELF_ID_RECEIVE_Q0_TIMESTAMP_SHIFT;
199}
200
159#endif /* _FIREWIRE_OHCI_H */
201#endif /* _FIREWIRE_OHCI_H */