skx_common.h (8028e290b6354ddb404e88f17fe5d37945cb122f) skx_common.h (1a251f52cfdc417c84411a056bc142cbd77baef4)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Common codes for both the skx_edac driver and Intel 10nm server EDAC driver.
4 * Originally split out from the skx_edac driver.
5 *
6 * Copyright (c) 2018, Intel Corporation.
7 */
8

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40#define I10NM_NUM_HBM_IMC 16
41#define I10NM_NUM_HBM_CHANNELS 2
42#define I10NM_NUM_HBM_DIMMS 1
43
44#define I10NM_NUM_IMC (I10NM_NUM_DDR_IMC + I10NM_NUM_HBM_IMC)
45#define I10NM_NUM_CHANNELS MAX(I10NM_NUM_DDR_CHANNELS, I10NM_NUM_HBM_CHANNELS)
46#define I10NM_NUM_DIMMS MAX(I10NM_NUM_DDR_DIMMS, I10NM_NUM_HBM_DIMMS)
47
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Common codes for both the skx_edac driver and Intel 10nm server EDAC driver.
4 * Originally split out from the skx_edac driver.
5 *
6 * Copyright (c) 2018, Intel Corporation.
7 */
8

--- 31 unchanged lines hidden (view full) ---

40#define I10NM_NUM_HBM_IMC 16
41#define I10NM_NUM_HBM_CHANNELS 2
42#define I10NM_NUM_HBM_DIMMS 1
43
44#define I10NM_NUM_IMC (I10NM_NUM_DDR_IMC + I10NM_NUM_HBM_IMC)
45#define I10NM_NUM_CHANNELS MAX(I10NM_NUM_DDR_CHANNELS, I10NM_NUM_HBM_CHANNELS)
46#define I10NM_NUM_DIMMS MAX(I10NM_NUM_DDR_DIMMS, I10NM_NUM_HBM_DIMMS)
47
48#define MAX(a, b) ((a) > (b) ? (a) : (b))
49#define NUM_IMC MAX(SKX_NUM_IMC, I10NM_NUM_IMC)
50#define NUM_CHANNELS MAX(SKX_NUM_CHANNELS, I10NM_NUM_CHANNELS)
51#define NUM_DIMMS MAX(SKX_NUM_DIMMS, I10NM_NUM_DIMMS)
52
53#define IS_DIMM_PRESENT(r) GET_BITFIELD(r, 15, 15)
54#define IS_NVDIMM_PRESENT(r, i) GET_BITFIELD(r, i, i)
55
56#define MCI_MISC_ECC_MODE(m) (((m) >> 59) & 15)

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48#define NUM_IMC MAX(SKX_NUM_IMC, I10NM_NUM_IMC)
49#define NUM_CHANNELS MAX(SKX_NUM_CHANNELS, I10NM_NUM_CHANNELS)
50#define NUM_DIMMS MAX(SKX_NUM_DIMMS, I10NM_NUM_DIMMS)
51
52#define IS_DIMM_PRESENT(r) GET_BITFIELD(r, 15, 15)
53#define IS_NVDIMM_PRESENT(r, i) GET_BITFIELD(r, i, i)
54
55#define MCI_MISC_ECC_MODE(m) (((m) >> 59) & 15)

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