mpc85xx_edac.c (10ce3cc919f50c2043b41ca968b43c26a3672600) mpc85xx_edac.c (084a4fccef39ac7abb039511f32380f28d0b67e6)
1/*
2 * Freescale MPC85xx Memory Controller kenel module
3 *
4 * Author: Dave Jiang <djiang@mvista.com>
5 *
6 * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express

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878
879 return IRQ_HANDLED;
880}
881
882static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
883{
884 struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
885 struct csrow_info *csrow;
1/*
2 * Freescale MPC85xx Memory Controller kenel module
3 *
4 * Author: Dave Jiang <djiang@mvista.com>
5 *
6 * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express

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878
879 return IRQ_HANDLED;
880}
881
882static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
883{
884 struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
885 struct csrow_info *csrow;
886 struct dimm_info *dimm;
886 u32 sdram_ctl;
887 u32 sdtype;
888 enum mem_type mtype;
889 u32 cs_bnds;
890 int index;
891
892 sdram_ctl = in_be32(pdata->mc_vbase + MPC85XX_MC_DDR_SDRAM_CFG);
893

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924 }
925 }
926
927 for (index = 0; index < mci->nr_csrows; index++) {
928 u32 start;
929 u32 end;
930
931 csrow = &mci->csrows[index];
887 u32 sdram_ctl;
888 u32 sdtype;
889 enum mem_type mtype;
890 u32 cs_bnds;
891 int index;
892
893 sdram_ctl = in_be32(pdata->mc_vbase + MPC85XX_MC_DDR_SDRAM_CFG);
894

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925 }
926 }
927
928 for (index = 0; index < mci->nr_csrows; index++) {
929 u32 start;
930 u32 end;
931
932 csrow = &mci->csrows[index];
933 dimm = csrow->channels[0].dimm;
934
932 cs_bnds = in_be32(pdata->mc_vbase + MPC85XX_MC_CS_BNDS_0 +
933 (index * MPC85XX_MC_CS_BNDS_OFS));
934
935 start = (cs_bnds & 0xffff0000) >> 16;
936 end = (cs_bnds & 0x0000ffff);
937
938 if (start == end)
939 continue; /* not populated */
940
941 start <<= (24 - PAGE_SHIFT);
942 end <<= (24 - PAGE_SHIFT);
943 end |= (1 << (24 - PAGE_SHIFT)) - 1;
944
945 csrow->first_page = start;
946 csrow->last_page = end;
947 csrow->nr_pages = end + 1 - start;
935 cs_bnds = in_be32(pdata->mc_vbase + MPC85XX_MC_CS_BNDS_0 +
936 (index * MPC85XX_MC_CS_BNDS_OFS));
937
938 start = (cs_bnds & 0xffff0000) >> 16;
939 end = (cs_bnds & 0x0000ffff);
940
941 if (start == end)
942 continue; /* not populated */
943
944 start <<= (24 - PAGE_SHIFT);
945 end <<= (24 - PAGE_SHIFT);
946 end |= (1 << (24 - PAGE_SHIFT)) - 1;
947
948 csrow->first_page = start;
949 csrow->last_page = end;
950 csrow->nr_pages = end + 1 - start;
948 csrow->grain = 8;
949 csrow->mtype = mtype;
950 csrow->dtype = DEV_UNKNOWN;
951 dimm->grain = 8;
952 dimm->mtype = mtype;
953 dimm->dtype = DEV_UNKNOWN;
951 if (sdram_ctl & DSC_X32_EN)
954 if (sdram_ctl & DSC_X32_EN)
952 csrow->dtype = DEV_X32;
953 csrow->edac_mode = EDAC_SECDED;
955 dimm->dtype = DEV_X32;
956 dimm->edac_mode = EDAC_SECDED;
954 }
955}
956
957static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)
958{
959 struct mem_ctl_info *mci;
960 struct mpc85xx_mc_pdata *pdata;
961 struct resource r;

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958}
959
960static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)
961{
962 struct mem_ctl_info *mci;
963 struct mpc85xx_mc_pdata *pdata;
964 struct resource r;

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