| i82443bxgx_edac.c (e644dae645e167d154c0526358940986682a72b0) | i82443bxgx_edac.c (084a4fccef39ac7abb039511f32380f28d0b67e6) |
|---|---|
| 1/* 2 * Intel 82443BX/GX (440BX/GX chipset) Memory Controller EDAC kernel 3 * module (C) 2006 Tim Small 4 * 5 * This file may be distributed under the terms of the GNU General 6 * Public License. 7 * 8 * Written by Tim Small <tim@buttersideup.com>, based on work by Linux 9 * Networx, Thayne Harbaugh, Dan Hollis <goemon at anime dot net> and 10 * others. 11 * 12 * 440GX fix by Jason Uhlenkott <juhlenko@akamai.com>. 13 * 14 * Written with reference to 82443BX Host Bridge Datasheet: | 1/* 2 * Intel 82443BX/GX (440BX/GX chipset) Memory Controller EDAC kernel 3 * module (C) 2006 Tim Small 4 * 5 * This file may be distributed under the terms of the GNU General 6 * Public License. 7 * 8 * Written by Tim Small <tim@buttersideup.com>, based on work by Linux 9 * Networx, Thayne Harbaugh, Dan Hollis <goemon at anime dot net> and 10 * others. 11 * 12 * 440GX fix by Jason Uhlenkott <juhlenko@akamai.com>. 13 * 14 * Written with reference to 82443BX Host Bridge Datasheet: |
| 15 * http://download.intel.com/design/chipsets/datashts/29063301.pdf | 15 * http://download.intel.com/design/chipsets/datashts/29063301.pdf |
| 16 * references to this document given in []. 17 * 18 * This module doesn't support the 440LX, but it may be possible to 19 * make it do so (the 440LX's register definitions are different, but 20 * not completely so - I haven't studied them in enough detail to know 21 * how easy this would be). 22 */ 23 --- 160 unchanged lines hidden (view full) --- 184} 185 186static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, 187 struct pci_dev *pdev, 188 enum edac_type edac_mode, 189 enum mem_type mtype) 190{ 191 struct csrow_info *csrow; | 16 * references to this document given in []. 17 * 18 * This module doesn't support the 440LX, but it may be possible to 19 * make it do so (the 440LX's register definitions are different, but 20 * not completely so - I haven't studied them in enough detail to know 21 * how easy this would be). 22 */ 23 --- 160 unchanged lines hidden (view full) --- 184} 185 186static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, 187 struct pci_dev *pdev, 188 enum edac_type edac_mode, 189 enum mem_type mtype) 190{ 191 struct csrow_info *csrow; |
| 192 struct dimm_info *dimm; |
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| 192 int index; 193 u8 drbar, dramc; 194 u32 row_base, row_high_limit, row_high_limit_last; 195 196 pci_read_config_byte(pdev, I82443BXGX_DRAMC, &dramc); 197 row_high_limit_last = 0; 198 for (index = 0; index < mci->nr_csrows; index++) { 199 csrow = &mci->csrows[index]; | 193 int index; 194 u8 drbar, dramc; 195 u32 row_base, row_high_limit, row_high_limit_last; 196 197 pci_read_config_byte(pdev, I82443BXGX_DRAMC, &dramc); 198 row_high_limit_last = 0; 199 for (index = 0; index < mci->nr_csrows; index++) { 200 csrow = &mci->csrows[index]; |
| 201 dimm = csrow->channels[0].dimm; 202 |
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| 200 pci_read_config_byte(pdev, I82443BXGX_DRB + index, &drbar); 201 debugf1("MC%d: %s: %s() Row=%d DRB = %#0x\n", 202 mci->mc_idx, __FILE__, __func__, index, drbar); 203 row_high_limit = ((u32) drbar << 23); 204 /* find the DRAM Chip Select Base address and mask */ 205 debugf1("MC%d: %s: %s() Row=%d, " 206 "Boundary Address=%#0x, Last = %#0x\n", 207 mci->mc_idx, __FILE__, __func__, index, row_high_limit, --- 6 unchanged lines hidden (view full) --- 214 /* This row is empty [p.49] */ 215 if (row_high_limit == row_high_limit_last) 216 continue; 217 row_base = row_high_limit_last; 218 csrow->first_page = row_base >> PAGE_SHIFT; 219 csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; 220 csrow->nr_pages = csrow->last_page - csrow->first_page + 1; 221 /* EAP reports in 4kilobyte granularity [61] */ | 203 pci_read_config_byte(pdev, I82443BXGX_DRB + index, &drbar); 204 debugf1("MC%d: %s: %s() Row=%d DRB = %#0x\n", 205 mci->mc_idx, __FILE__, __func__, index, drbar); 206 row_high_limit = ((u32) drbar << 23); 207 /* find the DRAM Chip Select Base address and mask */ 208 debugf1("MC%d: %s: %s() Row=%d, " 209 "Boundary Address=%#0x, Last = %#0x\n", 210 mci->mc_idx, __FILE__, __func__, index, row_high_limit, --- 6 unchanged lines hidden (view full) --- 217 /* This row is empty [p.49] */ 218 if (row_high_limit == row_high_limit_last) 219 continue; 220 row_base = row_high_limit_last; 221 csrow->first_page = row_base >> PAGE_SHIFT; 222 csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; 223 csrow->nr_pages = csrow->last_page - csrow->first_page + 1; 224 /* EAP reports in 4kilobyte granularity [61] */ |
| 222 csrow->grain = 1 << 12; 223 csrow->mtype = mtype; | 225 dimm->grain = 1 << 12; 226 dimm->mtype = mtype; |
| 224 /* I don't think 440BX can tell you device type? FIXME? */ | 227 /* I don't think 440BX can tell you device type? FIXME? */ |
| 225 csrow->dtype = DEV_UNKNOWN; | 228 dimm->dtype = DEV_UNKNOWN; |
| 226 /* Mode is global to all rows on 440BX */ | 229 /* Mode is global to all rows on 440BX */ |
| 227 csrow->edac_mode = edac_mode; | 230 dimm->edac_mode = edac_mode; |
| 228 row_high_limit_last = row_high_limit; 229 } 230} 231 232static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) 233{ 234 struct mem_ctl_info *mci; 235 u8 dramc; --- 232 unchanged lines hidden --- | 231 row_high_limit_last = row_high_limit; 232 } 233} 234 235static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) 236{ 237 struct mem_ctl_info *mci; 238 u8 dramc; --- 232 unchanged lines hidden --- |