i82443bxgx_edac.c (20bcb7a81dee21bfa3408f03f46b2891c9b5c84b) i82443bxgx_edac.c (c4192705fec85219086231a1c0fa61e8776e2c3b)
1/*
2 * Intel 82443BX/GX (440BX/GX chipset) Memory Controller EDAC kernel
3 * module (C) 2006 Tim Small
4 *
5 * This file may be distributed under the terms of the GNU General
6 * Public License.
7 *
8 * Written by Tim Small <tim@buttersideup.com>, based on work by Linux

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313 * time. */
314 pci_write_bits32(pdev, I82443BXGX_EAP,
315 (I82443BXGX_EAP_OFFSET_SBE | I82443BXGX_EAP_OFFSET_MBE),
316 (I82443BXGX_EAP_OFFSET_SBE | I82443BXGX_EAP_OFFSET_MBE));
317
318 mci->mod_name = EDAC_MOD_STR;
319 mci->mod_ver = I82443_REVISION;
320 mci->ctl_name = "I82443BXGX";
1/*
2 * Intel 82443BX/GX (440BX/GX chipset) Memory Controller EDAC kernel
3 * module (C) 2006 Tim Small
4 *
5 * This file may be distributed under the terms of the GNU General
6 * Public License.
7 *
8 * Written by Tim Small <tim@buttersideup.com>, based on work by Linux

--- 304 unchanged lines hidden (view full) ---

313 * time. */
314 pci_write_bits32(pdev, I82443BXGX_EAP,
315 (I82443BXGX_EAP_OFFSET_SBE | I82443BXGX_EAP_OFFSET_MBE),
316 (I82443BXGX_EAP_OFFSET_SBE | I82443BXGX_EAP_OFFSET_MBE));
317
318 mci->mod_name = EDAC_MOD_STR;
319 mci->mod_ver = I82443_REVISION;
320 mci->ctl_name = "I82443BXGX";
321 mci->dev_name = pci_name(pdev);
321 mci->edac_check = i82443bxgx_edacmc_check;
322 mci->ctl_page_to_phys = NULL;
323
324 if (edac_mc_add_mc(mci, 0)) {
325 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
326 goto fail;
327 }
328

--- 72 unchanged lines hidden --- 		322 mci->edac_check = i82443bxgx_edacmc_check;
323 mci->ctl_page_to_phys = NULL;
324
325 if (edac_mc_add_mc(mci, 0)) {
326 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
327 goto fail;
328 }
329

--- 72 unchanged lines hidden ---