i5100_edac.c (a7d7d2e1a07e3811dc49af2962c940fd8bbb6c8f) i5100_edac.c (084a4fccef39ac7abb039511f32380f28d0b67e6)
1/*
2 * Intel 5100 Memory Controllers kernel module
3 *
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
6 *
7 * This module is based on the following document:
8 *

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423 unsigned bank,
424 unsigned rank,
425 unsigned long syndrome,
426 unsigned cas,
427 unsigned ras,
428 const char *msg)
429{
430 const int csrow = i5100_rank_to_csrow(mci, chan, rank);
1/*
2 * Intel 5100 Memory Controllers kernel module
3 *
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
6 *
7 * This module is based on the following document:
8 *

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423 unsigned bank,
424 unsigned rank,
425 unsigned long syndrome,
426 unsigned cas,
427 unsigned ras,
428 const char *msg)
429{
430 const int csrow = i5100_rank_to_csrow(mci, chan, rank);
431 char *label = NULL;
431
432
433 if (mci->csrows[csrow].channels[0].dimm)
434 label = mci->csrows[csrow].channels[0].dimm->label;
435
432 printk(KERN_ERR
433 "CE chan %d, bank %u, rank %u, syndrome 0x%lx, "
434 "cas %u, ras %u, csrow %u, label \"%s\": %s\n",
435 chan, bank, rank, syndrome, cas, ras,
436 printk(KERN_ERR
437 "CE chan %d, bank %u, rank %u, syndrome 0x%lx, "
438 "cas %u, ras %u, csrow %u, label \"%s\": %s\n",
439 chan, bank, rank, syndrome, cas, ras,
436 csrow, mci->csrows[csrow].channels[0].dimm->label, msg);
440 csrow, label, msg);
437
438 mci->ce_count++;
439 mci->csrows[csrow].ce_count++;
440 mci->csrows[csrow].channels[0].ce_count++;
441}
442
443static void i5100_handle_ue(struct mem_ctl_info *mci,
444 int chan,
445 unsigned bank,
446 unsigned rank,
447 unsigned long syndrome,
448 unsigned cas,
449 unsigned ras,
450 const char *msg)
451{
452 const int csrow = i5100_rank_to_csrow(mci, chan, rank);
441
442 mci->ce_count++;
443 mci->csrows[csrow].ce_count++;
444 mci->csrows[csrow].channels[0].ce_count++;
445}
446
447static void i5100_handle_ue(struct mem_ctl_info *mci,
448 int chan,
449 unsigned bank,
450 unsigned rank,
451 unsigned long syndrome,
452 unsigned cas,
453 unsigned ras,
454 const char *msg)
455{
456 const int csrow = i5100_rank_to_csrow(mci, chan, rank);
457 char *label = NULL;
453
458
459 if (mci->csrows[csrow].channels[0].dimm)
460 label = mci->csrows[csrow].channels[0].dimm->label;
461
454 printk(KERN_ERR
455 "UE chan %d, bank %u, rank %u, syndrome 0x%lx, "
456 "cas %u, ras %u, csrow %u, label \"%s\": %s\n",
457 chan, bank, rank, syndrome, cas, ras,
462 printk(KERN_ERR
463 "UE chan %d, bank %u, rank %u, syndrome 0x%lx, "
464 "cas %u, ras %u, csrow %u, label \"%s\": %s\n",
465 chan, bank, rank, syndrome, cas, ras,
458 csrow, mci->csrows[csrow].channels[0].dimm->label, msg);
466 csrow, label, msg);
459
460 mci->ue_count++;
461 mci->csrows[csrow].ue_count++;
462}
463
464static void i5100_read_log(struct mem_ctl_info *mci, int chan,
465 u32 ferr, u32 nerr)
466{

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832 i5100_init_mtr(mci);
833}
834
835static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
836{
837 int i;
838 unsigned long total_pages = 0UL;
839 struct i5100_priv *priv = mci->pvt_info;
467
468 mci->ue_count++;
469 mci->csrows[csrow].ue_count++;
470}
471
472static void i5100_read_log(struct mem_ctl_info *mci, int chan,
473 u32 ferr, u32 nerr)
474{

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840 i5100_init_mtr(mci);
841}
842
843static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
844{
845 int i;
846 unsigned long total_pages = 0UL;
847 struct i5100_priv *priv = mci->pvt_info;
848 struct dimm_info *dimm;
840
841 for (i = 0; i < mci->nr_csrows; i++) {
842 const unsigned long npages = i5100_npages(mci, i);
843 const unsigned chan = i5100_csrow_to_chan(mci, i);
844 const unsigned rank = i5100_csrow_to_rank(mci, i);
845
846 if (!npages)
847 continue;
848
849 /*
850 * FIXME: these two are totally bogus -- I don't see how to
851 * map them correctly to this structure...
852 */
853 mci->csrows[i].first_page = total_pages;
854 mci->csrows[i].last_page = total_pages + npages - 1;
849
850 for (i = 0; i < mci->nr_csrows; i++) {
851 const unsigned long npages = i5100_npages(mci, i);
852 const unsigned chan = i5100_csrow_to_chan(mci, i);
853 const unsigned rank = i5100_csrow_to_rank(mci, i);
854
855 if (!npages)
856 continue;
857
858 /*
859 * FIXME: these two are totally bogus -- I don't see how to
860 * map them correctly to this structure...
861 */
862 mci->csrows[i].first_page = total_pages;
863 mci->csrows[i].last_page = total_pages + npages - 1;
855 mci->csrows[i].page_mask = 0UL;
856
857 mci->csrows[i].nr_pages = npages;
864 mci->csrows[i].nr_pages = npages;
858 mci->csrows[i].grain = 32;
859 mci->csrows[i].csrow_idx = i;
865 mci->csrows[i].csrow_idx = i;
860 mci->csrows[i].dtype =
861 (priv->mtr[chan][rank].width == 4) ? DEV_X4 : DEV_X8;
862 mci->csrows[i].ue_count = 0;
863 mci->csrows[i].ce_count = 0;
864 mci->csrows[i].mtype = MEM_RDDR2;
865 mci->csrows[i].edac_mode = EDAC_SECDED;
866 mci->csrows[i].mci = mci;
867 mci->csrows[i].nr_channels = 1;
866 mci->csrows[i].mci = mci;
867 mci->csrows[i].nr_channels = 1;
868 mci->csrows[i].channels[0].chan_idx = 0;
869 mci->csrows[i].channels[0].ce_count = 0;
870 mci->csrows[i].channels[0].csrow = mci->csrows + i;
868 mci->csrows[i].channels[0].csrow = mci->csrows + i;
871 snprintf(mci->csrows[i].channels[0].dimm->label,
872 sizeof(mci->csrows[i].channels[0].dimm->label),
873 "DIMM%u", i5100_rank_to_slot(mci, chan, rank));
874
875 total_pages += npages;
869 total_pages += npages;
870
871 dimm = mci->csrows[i].channels[0].dimm;
872 dimm->grain = 32;
873 dimm->dtype = (priv->mtr[chan][rank].width == 4) ?
874 DEV_X4 : DEV_X8;
875 dimm->mtype = MEM_RDDR2;
876 dimm->edac_mode = EDAC_SECDED;
877 snprintf(dimm->label, sizeof(dimm->label),
878 "DIMM%u",
879 i5100_rank_to_slot(mci, chan, rank));
876 }
877}
878
879static int __devinit i5100_init_one(struct pci_dev *pdev,
880 const struct pci_device_id *id)
881{
882 int rc;
883 struct mem_ctl_info *mci;

--- 202 unchanged lines hidden --- 		880 }
881}
882
883static int __devinit i5100_init_one(struct pci_dev *pdev,
884 const struct pci_device_id *id)
885{
886 int rc;
887 struct mem_ctl_info *mci;

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